A dynamically reconfigurable monolithic cmos pressure sensor for smart fabric

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A Dynamically Reconfigurable Monolithic CMOS Pressure Sensor for Smart Fabric Maximilian Sergio, Nicolò Manaresi, Fabio Campi, Roberto Canegallo, Marco Tartagni, and Roberto Guerrieri

Abstract—This paper presents a mixed-signal system-on-chip (SOC) for sensing capacitance variations, enabling the creation of pressure-sensitive fabric. The chip is designed to sit in the corner of a smart fabric such as elastic foam overlaid with a matrix of conductive threads. When pressure is applied to the matrix, an image is created from measuring the differences in capacitance among the rows and columns of fibers patterned on the two opposite sides of the elastic substrate. The SOC approach provides the flexibility to accommodate for different fabric sizes and to perform image enhancement and on-chip data processing. The chip has been designed in a 0.35- m five-metal one-poly CMOS process working up to 40 MHz at 3.3 V of power supply, in a fully reconfigurable arrangement of 128 I/O lines. The core area is 32 mm2 . Index Terms—Capacitive, CMOS, pressure sensor, smart textile. Fig. 1. Concept of pressure-sensitive fabric.

I. INTRODUCTION

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UMAN BEINGS are able to manipulate and explore objects in their environment using the sense of touch. Haptic exploration is an important mechanism by which humans learn about the properties of unknown objects. Through the sense of touch, we are able to learn about characteristics such as object shape and stiffness. Among a variety of human communication media, gesture and touch play an important role in our daily life. Therefore, it is important and effective to introduce haptic and gesture communication into industrial robots [1] and consumer products. As computing becomes more ubiquitous and distributed, there is a growing need for human–computer interfaces that support a new interaction paradigm. As an example, the intelligent toy market is looking for new ways of using all available information sources, including human touch, in order to provide a smarter user interaction whereby the toy’s reaction reflects how it is handled. The reaction will thus be different if it is stroked or slapped, or even whether a child or an adult picks it up. This may be achieved by a device interfaced with a smart fabric wrapping the toy and providing information on the pressure field distribution and its temporal variation. A fabric substrate is very appealing: it is flexible and partially extensible [2] to conform to different shapes, supported by a well-known technology, and produced at low cost. Manuscript received July 18, 2002; revised March 3, 2003. This work was supported by Central R&D, STMicroelectronics, Italy. M. Sergio, F. Campi, M. Tartagni, and R. Guerrieri are with ARCES, University of Bologna, 40136 Bologna, Italy (e-mail: [email protected]; [email protected]; [email protected]). N. Manaresi is with Silicon Biosystems srl, 40125 Bologna, Italy (e-mail: [email protected]). R. Canegallo is with ARCES, University of Bologna, 40136 Bologna, Italy. He is also with Central R&D, STMicroelectronics, 40021 Agrate Brianza Milan, Italy (e-mail: [email protected]). Digital Object Identifier 10.1109/JSSC.2003.811977

Some smart pressure sensors interfacing with a flexible substrate have been developed, but they are either based on electrooptical fabric [3], [4] which is not suitable for the low-cost market, or they need cumbersome printed circuit board (PCB) electronics [5]. Conversely, other devices such as tactile sensors arrays [6] enable an image of the pressure field to be grabbed, but they are based on sensing materials such as piezoelectric and piezoresistive substrates [7], [8] which are very difficult to embed into elastic fabric because strong mechanical stresses, such as impacts and compressions (that are very common situations during the use of toys), can seriously damage these sophisticated sensors. This paper presents an innovative single-chip solution to be interfaced with a pressure-sensitive fabric so that it can fit in a corner of the sensor and produce a digitally processed image. The main advantage of our approach is the possibility of using distributed pressure information, from sensors that are analogous to artificial skin, to achieve haptic awareness. To obtain this kind of intelligence (that cannot be achieved by merely collecting and displaying sensory information, as most pressure sensors do) the on-chip computational power is used to extract and compress information related to the pressure field exerted on the fabric. A palm of a hand being pushed over the fabric, for example, can be processed and compacted so as to result in a single bit word issuing from the digital I/O port. This paper is organized as follows. Section II presents an overview of the sensor working principle. Section III discusses the design constraints and specifications involved in acquiring the pressure image. In Section IV, the architecture of the sensor is described along with details of the solutions adopted to overcome the stringent system constraints. Section V reports measurement results, and conclusions are drawn in Section VI.

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SERGIO et al.: CMOS PRESSURE SENSOR FOR SMART FABRIC

Fig. 2. System level operation. The pressure exerted on the fabric is converted into an electric signal by means of a readout circuit. The image acquired is first digitized and then elaborated by MCU software.

II. SENSOR WORKING PRINCIPLE AND SOC APPROACH The working principle of the sensor is sketched in Fig. 1. A map of the pressure applied over the fabric surface is achieved by detecting the capacitance variation between rows and columns of conductive fibers patterned on the two opposite sides of an elastic layer of synthetic foam. When pressure is exerted on the smart fabric, the dielectric layer between corresponding rows and columns is reduced in thickness, thus, increasing the related coupling capacitance. In our first implementation, the conductive columns and rows have been drawn onto opposite sides of a piece of insulating material using conductive ink. The use of fabric for implementing both substrates and conductive patterns allows us to obtain a flexible and partially extensible pressure sensor. Fig. 2 shows an example of the application principle. A piece of smart fabric is wrapped around the cylindric exterior of a bottle. According to the pressure exerted on the smart fabric, a certain portion of the foam is squeezed, thus, increasing the coupling capacitance of the electrodes patterned over it. The induced charge variation is converted into a voltage value by means of readout circuitry embedded into the chip. The analog signal is then converted into digital and processed by a RISC microcontroller [9]. The main benefit of such an approach consists of a simplification of the sensor arrangement so that it can work in harsh environments. In fact, the use of a simple capacitive sensing scheme results in a robust sensor even if exposed to strong mechanical stresses (e.g., impact, compression) that are incompatible with the working conditions required by more sophisticated sensors. III. SYSTEM REQUIREMENTS The system needs to acquire an image of the pressure being exerted over a large piece of fabric. Since the fabric is intended to wrap up different shaped objects, its aspect ratio may vary from narrow rectangular boxes to large square canvas. The device treats the sensor area as a matrix. Thus, each row and column has to be separately addressable so that a complete image may be achieved.

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The main problem associated with this approach is related to the difficulty of sensing very small capacitances, typically varying in the range of few hundred femtofarads. The value of the addressed capacitance (sensed capacitance of Fig. 1) is measured by applying a voltage step and by reading out the corresponding charge variation, as will be explained in Section IV. The generated signal is proportional to the value of the capacitance, thus, it is inversely proportional to the distance of the plates, i.e., the insulating layer thickness. The use of simple and inexpensive materials (such as fabric and foam) for implementing both substrates and conductive threads introduces a great spread in thickness among the sensor surface at the rest position. This kind of noise [something similar to fixed pattern noise (FPN)] affects the measure of the capacitance value. Since the pressure value is then converted to digital by means of an embedded A/D converter (ADC), we face the choice to accept this inhomogeneity in pixel values when its maximum value is comparable to the resolution of the converter. In order to measure the value of the addressed capacitance (sensed capacitance of Fig. 1), the readout circuitry must be insensitive to the parasitics due to neighboring rows and columns coupling capacitance. Early experiments on textiles have reported a sensed capacitance value of about few hundreds of femtofarads, while the typical parasitic capacitance values vary from a few picofarads up to 10 pF. This kind of influence is very similar to the crosstalk noise. In our system, we can distinguish two types of crosstalk. The first is due to the mechanical deformation induced by the pressure exerted on a certain area on the neighboring region, since the material used as dielectric is not perfectly elastic. The second kind of crosstalk is due to the charge redistribution between the sensed capacitance and the adjacent ones. This charge sharing has been reduced by means of the embedded readout circuitry, as will be explained is Section IV. More specifically, this contribution has been made negligible with respect to the mechanical crosstalk. To interact in real time with the human environment, the system may be required to implement gesture recognition so as to customize, for instance, the behavior of a toy to different situations. To achieve this task, at least 10 frames per second has to be attained. Assuming an image composed of 64 64 pixels, at the frame rate specified the pixel readout time is s. In order to recognize different reactions, the system has to perform a few elementary operations on the pixel value, such as averaging, reference subtraction, and convolution. Consider, as an example, a piece of smart textile wrapped around an object used to discriminate if a child or an adult is holding it. Let us assume recognition is performed by means 64 rows and columns. of a square piece of fabric with 64 The simplest solution would be to count the number of points (pixels) that exceed a certain value of pressure (used as a reference), given that the hand of an adult is larger than the hand of a child. The system has to perform a total of 64 64 (2 address write 1 pixel read 1 reference subtraction 1 sum operation) 20480 operations for each measurement.

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Fig. 3. System architecture and organization. TABLE I SYSTEM REQUIREMENTS

Furthermore, the device has to store the computed value in order to accomplish the subsequent comparison. Working at a frame rate of 10 frames per second, the resulting minimum system clock frequency is about 4.88 MHz. Only at the end of this process can the system perform an I/O operation issuing a single bit word to an output port. These estimates give a lower bound of 5 million operations per second (MOPS) for the minimum computational power required. Table I gives the system level requirements. IV. SYSTEM ARCHITECTURE Following the constraints described in the previous section, the device has been designed with 128 analog I/O channels to

address any aspect ratio of pixels where . To cope with time requirements, the readout has been designed to acquire at least 64 64 pixels at 10 frames/s. The chip embeds a special purpose block called Analog I/O (as depicted in Fig. 3) to separately address each analog pad. This block features the analog channels configuration as input or output signals and will be described in detail later in this section. The Analog I/O block contains two registers that define the matrix aspect ratio; each line can be configured as a row or as a column. A row register and a column register are used to select each single row and column. The addressing block can be programmed at run time by the embedded microcontroller. The addressing operation is performed by writing the current value in the row register and in the column register. Pressure image acquisition can be divided into two pipelined operations: pixel acquisition and elaboration. During the first phase, pressure variation is translated into a voltage and converted to digital, while during the second phase, the information embodied in this signal is treated by image processing techniques. The system level architecture reflects this HW/SW partitioning. The chip is based on two embedded macro blocks: an analog interface and a digital processing system. The

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Fig. 5.

Analog signal path block diagram.

to be readout by the chip charge amplifier. The voltage variation is proportional to the value of the charge amplifier output of the capacitance of the addressed node, according to Fig. 4.

Sensing scheme.

analog core translates the pressure information into an 8-bit digital word. The digital core processes the digitized signal; in particular, it implements two compensation techniques, namely, FPN cancellation and gamma correction, in order to improve the image quality. This simple image processing is carried out by software routines that run on the embedded 32-bit microcontroller. The digital macro also supports pixel addressing and drives the analog block control signals. This task requires adoption of a specific block in order to reduce power consumption and roll back the overall microcontroller computational burden. Fig. 3 shows the system architecture and organization. The main tasks of the embedded architecture are outlined below. A. Analog Signal Path The capacitor array sensing scheme is sketched in Fig. 4. The most critical part of the project was making sure that each pixel capacitance value was insensitive to pixels from neighboring columns and rows. This can be achieved by grounding all rows and columns except those selected. the meaIn order to sense the capacitance value of surement setup must be insensitive to the value of other pixels and to the value of parasitics between neighboring columns, and between neighboring rows, which can easily amount to two to three orders of magnitude larger than the addressed pixel capacitance as described in the previous section. Since the virtual ground node is at a fixed voltage level: 1) grounding all columns but the selected one allows us to avoid injection from the neighboring columns by way of and 2) grounding all rows but the selected one allows us to avoid injection from pixels in the same column. This mode of operation is of paramount importance for getting a good signal-to-noise ratio and contrast. The charge amplifier (Fig. 4) operates as follows. The feedback switch S1 is first closed to reset the operational amplifier. is applied to Then S1 is opened and a voltage step the pixel’s row so that a charge flux is collected at pixel column

where is the line capacitance, is the open-loop gain of is the feedback capacitance. the operational amplifier, and This relation makes clear how an high value of is required to reduce the effect of the line capacitance. The 128 analog I/O channels of the chip can be reconfigured as inputs or outputs at power up, to accommodate for different sizes and aspect ratios of the smart fabric. According to the addressing scheme described above and illustrated in its basic blocks in Fig. 5, unselected channels are grounded, while selected channels are connected to either outCom or inCom of the readout circuit. The operational amplifier employed in the readout has been designed for 60 dB of open-loop gain using a folded cascode scheme. Its stability is ensured at closed-loop gain configuration with the minimum estimated output capacitance. The latter design rule ensures the stability of the system in any configuration of the readout circuit. To accommodate for a wide range of smart fabric implementations, it is very important to have the maximum flexibility in setting both dynamic range and response time. As far as the dynamic range is concerned, the feedback cacan be varied from 25.2 fF to 12.8 pF by selectively pacitor switching a bank of 256 elementary capacitors so as to control the gain of the system. On the other hand, the readout time has to be adjusted to the different configurations of the smart fabric and of the gain. In fact, the readout time of the charge amplifier is set by

where is the gain-bandwidth product of and are the total the operational amplifier, in which capacitance at the output node and the transconductance of is highly the operational amplifier, respectively. Therefore, and which are related dependent on the values of to the choice of the readout gain, size of the smart fabric, type of connectors, and length of the connection. To adapt the readout time to any possible configuration, a bank of 16 oper-

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Fig. 6. Reconfigurable readout scheme.

ational amplifiers are selectively connected in parallel fashion as illustrated in Fig. 6. By selectively enabling the operational amplifiers biases one can increase the gain-bandwidth product, thus, trading off time response for power consumption. The configuration of the readout circuit is stored in special registers that are used by the digital controller at startup time. By adjusting the readout feedback capacitor and the input , a wide dynamic range of fabric capacitors can be supstep ported even with a moderate ADC resolution. Accordingly, an 8-bit successive approximation ADC [10] is employed to provide a digital value for further processing by the microcontroller. B. Digital Architecture The embedded microprocessor has been mapped from a soft macro [9] and represents an evolution of the standard DLX RISC, while embedded memories are imported from standard hardware macro libraries. The layout of the system has been integrated using commercial place and route tools. The digital core provides management of the whole operation in real time. After the booting operation, it supports pixel acquisition, run time analog control signals, and pixel processing. The boot code is stored in a specific ROM. During the system power-up session, the microcontroller unit (MCU) downloads the code from the I/O interface and stores it in the instruction RAM. The communication is driven by an interrupt protocol served by the MCU. A system configuration phase follows, where, according to the downloaded code, the various parameters for image acquisition are set. The readout block features a digital interface to support communication with the MCU via a data bus. The MCU acquires a pixel reading the ADC and elaborates it according to the downloaded software. FPN compensation and gamma correction are performed. These features are software implemented as lookup tables (LUTs) stored in the data RAM. Programmable Waveform Generator: This block is intended to generate programmable control signals for the readout

Fig. 7. Programmable waveform generator architecture.

and ADC blocks (Fig. 7). Its main function is to generate the signals of the readout and ADC blocks. It consists of a finite state machine (FSM) and a set of four ring shift registers. The FSM supports the communication protocol between the microprocessor and the analog blocks. For each output waveform, a 128-bit word composed of the shift register pattern is initially fetched from the RAM and then loaded into the waveform generator during the system configuration phase. When triggered, the patterns rotate once in the shifters, generating the signal desired. This operation frees MCU processing cycles for pixel elaboration, thus, enabling pipelining. The waveform clock cycle can be set by means of a frequency divider. Each shift register is separately addressable. The FSM determines which registers have to be activated according to the MCU code. The selected blocks receive an ENABLE signal used to gate the system clock. After generating the corresponding pattern, the ENABLE signal is deasserted until another start word is issued by the MCU. The clock gating scheme reduces the system level power consumption. Bus Architecture: The MCU and the memories communicate through a 32-bit multiplexed core bus featuring interrupt support. This bus performs pixel elaboration and data transfer between MCU and memories. An address bridge allows a peripheral internal bus to be managed. The MCU accomplishes two main tasks: pixel acquisition and devices configuration. A simple handshake protocol has been developed to synchronize microprocessor activity with the waveform generator. This protocol is managed by two control signals, START and BUSY, implemented via software by way of the chip data bus. As communication through the bus has been defined at the transaction layer [11], it is independent of any special feature of the main system’s blocks. This modular architecture makes the design

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TABLE II CHIP CHARACTERISTICS

Fig. 8.

Photo of the chip.

and implementation of each block independent of others in the system. V. EXPERIMENTAL RESULTS The SOC described has been fabricated in a 0.35- m five-metal one-poly standard CMOS process from STMicroelectronics. A total of 256 pads are included in this first prototype in order to test the chip and perform measurements on both digital and analog blocks. This number can be reduced by as much as 152 by including only the 128 analog I/O channels, the 17 parallel port signals, and some other system control signals. The chip area of this prototype is, thus, pad limited to 9.9 9.9 mm , but the area effectively occupied by the circuit is 34.5 mm . A microphotograph of the chip is shown in Fig. 8 and its specifications are summarized in Table II. For validating the chip, a 24 16 pixel smart fabric was implemented and connected to the PCB testing board. The pixel pitch is 8 mm, which is about the tactile sensory resolution of nerve endings on the human back. The electrodes are implemented by parallel stripes using conductive threads in a fabric structure, which is thermally soldered to the opposite sides of a foam layer. Finally, the ends of the conductive stripes are connected to the board by means of wires. A photograph of the fabric is illustrated in Fig. 9. The pixel capacitance is minimum at rest and increases as the fabric surface is subject to external pressure. Obviously, the pressure-capacitance function reaches a saturation point once the fabric is squeezed down to a minimum thickness, due to the material properties. With this setup, the saturation point corresponds to a measured pressure value of 13.6 kPa. Experimental measurements have reported pixel capacitances ranging from 300 fF to 1 pF and inter-line capacitance values of about 2.5 pF. Preliminary tests on the readout section of the chip have reported an 8- s settling time at minimum speed (only one operational amplifier active) and 1.5 s at maximum gain-bandwidth (all the operational amplifiers active).

Fig. 9.

Smart fabric prototype.

Fig. 10 shows analog and digital waveforms of the chip under testing. More specifically, the top of the figure shows the output of the charge amplifier with different input capacitors, the middle waveform shows the CHARGE signal, generated by the waveform generator, which is used to inject a fixed amount of charge into readout system. On the bottom right of the picture is displayed the triggering of the control signals by MCU via software implemented protocol. With the first write operation (START condition) the generation of the analog control begins. The waveform generator drives the signals for a complete readout operation. The second write operation (STOP condition) prevents another readout cycle to be generated until another START condition is issued. In this way, only a single pixel read operation and conversion is performed. Examples of images acquired by the device are illustrated in Fig. 11. The upper left of Fig. 11 shows a hand palm pressed onto the artificial skin plane, while the upper right illustrates a fist. A square shape and the bottom of a bottle are also depicted. None of the aforementioned images are treated by any smoothing software. The use of fabric for implementing both substrates and conductive patterns allows us to obtain a flexible and partially ex-

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Fig. 10. Waveforms from chip under test. From top to bottom: output of the charge amplifier with different input capacitors, charge signal generated by waveform generator block, and synchronization with embedded MCU via software protocol.

Fig. 11. Pressure Images acquired by the sensor. The feedback capacitor is set to 12.5 pF. (a) Palm of a hand. (b) Fist. (c) Square object. (d) Bottom of a bottle. Frame rate is 10 frame/s.

tensible pressure sensor. The main drawback of this approach is the introduction of nonidealities and differences between pixels of the sensor array. This kind of noise (FPN) affects the sensing fabric according to the resting position. Furthermore, the use of a foam layer as the sensor substrate introduces strong nonlinearities in pressure versus capacitance function. This can affect the perception of weak pressure values such as those generated by

gentle stroking. In order to compensate for these effects, on-chip run-time postprocessing of the acquired images is performed. FPN: FPN is a phenomenon due to electrode roughness (resolution accuracy in textile technology), to nonuniform dielectric layer (thickness not constant across the fabric surface), and to the adaption to the wrapped object (two-dimensional piece of fabric wrapped around a three-dimensional surface). Its main effect is a spread in capacitance values at the rest position. The left side of Fig. 12 shows a three-dimensional (3-D) plot and a histogram of the measured capacitance values acquired from a square piece of fabric without pressure being exerted. Nonidealities and mismatches result in different pixel values with considerable border effects. The proposed solution features a digital FPN suppression. The MCU subtracts from the current pixel signal a corresponding reference value measured at the rest position. These zero values are stored in the system RAM and used by the embedded FPN-cancellation routine during run-time pixel processing. The right side of Fig. 12 shows the 3-D plot and the histogram of the capacitor array measured from the same piece of fabric after the adoption of the described compensation, showing a strong reduction of the undesired spread in pixel values. Gamma Correction: The relation between pressure and capacitance values is usually strongly nonlinear. To counteract this, a compensation similar to the gamma correction used in image processing has been implemented to enhance the perception of weak signals like those generated by gentle stroking. As with the FPN cancellation approach, the correction function is accomplished by an LUT stored in the data RAM and processed by the embedded MCU. Fig. 13(a) gives the image of a fist as detected by the system without any correction and Fig. 13(b) shows the same image treated by on-chip FPN suppression algorithm. To further enhance identification of the object, the same

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Fig. 12.

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FPN compensation. Noise as a reference image.

Fig. 14.

Fig. 13. On-chip image processing. (a) Raw image. (b) Image treated with digital FPN compensation. (c) Image treated with LUT gamma correction. Images acquired at 10 frame/s with a feedback capacitor of 12.8 pF.

image has been treated by on-chip gamma correction code as illustrated in Fig. 13(c). Crosstalk: Neighboring capacitors charge injection is one of the most important issues in the capacitive sensing especially when a small capacitance has to be sensed [12]. The amount of charge that is injected into the sensed capacitance depends on several factors such as the slope of the excitation signal and input/output capacitance ratio. The problem can be generally neglected, but if the amount of charge is comparable to the charge amplifier sensitivity, as in our design, great care has to be taken to avoid spurious injection of charge into the input. When only one sensing element is addressed, the capacitor array can be represented as in Fig. 14, where the contribution of the parasitic capacitances is taken into account.

Capacitor array and readout scheme when a single pixel is addressed.

As described in Section IV, the voltage variation of the charge is proportional to the value of the capacamplifier output itance of the addressed pixel, according to

where is the open-loop gain of the operational amplifier and is the feedback capacitance. A high value of assures that the charge injection from can be neglected, since this capacitor is connected to a virtual ground. In this case, the previous relation can be simplified as

On the other hand, the value of affects the settling time of the operational amplifier as shown in Section IV. An open-loop gain of 60 dB assures the correct tradeoff between speed and noise immunity to attain a readout time less than 24 s required to achieve the desired frame rate without degrading the linearity ratio. of the

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[9] F. Campi, R. Canegallo, and R. Guerrieri, “IP-reusable 32-bit VLIW RISC core,” in Proc. Eur. Solid-State Circuits Conf., Sept. 2001, pp. 456–459. [10] R. van der Plassche, Integrated Analog-to-digital and Digital-to-Analog Converters. Boston, MA: Kluwer, 1994. [11] H. Chang et al., Surviving the SoC Revolution-A Guide to PlatformBased Design. New York: Kluwer, 1999. [12] M. Tartagni and R. Guerrieri, “A fingerprint sensor based on the feedback capacitive sensing scheme,” IEEE J. Solid-State Circuits, vol. 33, pp. 133–142, Jan. 1998.

Fig. 15. Measured charge amplifier output signal with different feedback capacitance values.

Fig. 15 illustrates the measured charge amplifier output signal values. with different

Maximilian Sergio received the Dr.Eng. degree (cum laude) in microelectronics and the Ph.D. degree in electronics and computing science from the University of Bologna, Bologna, Italy, in 1998 and 2003, respectively. Since 2000, he has been working as full-time Consultant for the Central R&D Division, ST Microelectronics, Milan, Italy. He is currently a Researcher with the Advanced Reasearch Center on Electronic Systems E.DeCastro (ARCES), Bologna. His research focuses on the utilization of STM CMOS technologies and CAD platforms for the development and physical implementation of innovative digital and mixed-signal projects in particular in the field of smart sensors.

VI. CONCLUSION A mixed-signal SOC for decoding the pressure exerted over a large piece of smart fabric is presented. The map of the pressure applied over the fabric surface is achieved by detecting the capacitance variation between rows and columns of conductive fibers patterned on the two opposite sides of an elastic layer such as synthetic foam. The device has been designed for acquiring up to 64 64 pixels at 10 frames/s. Using a multicore approach, the digital and analog structures are designed to be fully independent of each other so as to achieve a complete overlap of the digital computation phase with the array readout.

Nicolò Manaresi received the Ph.D. degree (cum laude) in electrical engineering and computer sciences from the University of Bologna, Bologna, Italy, in 1993 and 1999, respectively. From 1993 to 1995 and 1997 to 2000, he was with the University of Bologna working as a Consultant to ST Microelectronics, Milan, Italy, in the field of analog ICs and sensors design. In 1996, he spent one year as a Research Assistant with the Swiss Federal Institute of Technology, Zurich. In 1999, he cofounded Silicon Biosystems srl, Bologna, and continues to serve as its CEO. He is a coauthor of more than 25 scientific papers and coholder of 8 European and U.S. patents.

ACKNOWLEDGMENT The authors would like to thank C. Guaglio of ARFIL snc, Italy, for his suggestions about the smart fabric, and A. GoriScrittori for the test board. REFERENCES [1] Y. Cai, Y. Fukui, J. Yamashita, and M. Shimojo, “A wide-range power haptic interface for virtual environment,” Trans. Virtual Reality Soc. Jpn., vol. 3, no. 3, pp. 65–74, 1998. [2] V. J. Lumelsky, M. S. Shur, and S. Wagner, “Sensitive skin,” IEEE Sensors J., vol. 1, pp. 41–51, June 2001. [3] S. Jayaraman, S. Park, and R. Rajamanickam, “Full-fashioned weaving process for production of a woven garment with intelligence capability,” U.S. Patent 6 145 551, Nov. 14, 2000. [4] E. Reimer and L. Danisch, “Pressure sensor based on illumination of a deformable integrating cavity,” U.S. Patent 5 917 180, June 29, 1999. [5] P. Wellman, J. Son, and R. Howe, “System generating a pressure profile across a pressure sensitive membrane,” U.S. Patent 5 983 727, Nov. 16, 1999. [6] L. Ping and W. Yumei, “An arbitrarily distributed tactile sensor array using piezoelectric resonator,” in Proc. IEEE Instrumentation and Measurement Technology Conf., June 1996, pp. 502–505. [7] R. E. Morley, Jr., E. J. Richter, J. W. Klaesner, K. S. Maluf, and M. J. Mueller, “In-shoe multisensory data acquisition system,” IEEE Trans. Biomed. Eng., vol. 48, pp. 815–820e, July 2001. [8] T. Harada,, T. Sato, and T. Mori, “Human motion tracking system based on skeleton and surface integration model using pressure sensors distribution bed,” in Proc. Workshop Human Motion, 2000, pp. 99–106.

Fabio Campi received the M.Sc. degree in microelectronics and the Ph.D. degree in electronics and computing science from the University of Bologna, Bologna, Italy, in 1999 and 2003, respectively. Since 1999, he has been a Consultant for Central R&D, ST Microelectronics, Milan, Italy, for the application of innovative CMOS design platforms on digital system-on-chip design. He is currently also with the Advanced Reasearch Center on Electronic Systems E.DeCastro (ARCES), Bologna. His main research interests are VLSI SOC design, embedded microprocessors, and the development of advanced architectures and algorithms for digital signal processing.

Roberto Canegallo received the degree in electronic engineering from the University of Pavia, Pavia, Italy. Since 1992, he has been with STMicroelectronics, Milan, Italy, conducting research on a wide variety of topics in mixed-analog systems, such as optical character recognition, image sensors, and multilevel nonvolatile flash memories. In 1999, he joined the Laboratory ST, University of Bologna, Bologna, Italy. His current research interest includes the development of three-dimensional high-bandwidth chip-to-chip communication.

SERGIO et al.: CMOS PRESSURE SENSOR FOR SMART FABRIC

Marco Tartagni received the Laurea degree in electrical engineering and the Ph.D. degree in electrical engineering and computer sciences from the University of Bologna, Bologna, Italy, in 1988 and 1993, respectively. He joined the Department of Electrical Engineering, California Institute of Technology, Pasadena, in 1992 as a Visiting Student and became a Research Fellow in 1994, working on various aspects of analog VLSI for imaging processing. Since 1995, he has been an Assistant Professor with the Department of Electronics, University of Bologna, where he has designed and tested low-noise optical and capacitive sensors. He is currently involved in research on sensors aiming at implementing a hybrid technology composed of self-assembling proteins with microelectronics technology, called Receptronics.

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Roberto Guerrieri received the electrical engineering degree and the Ph.D. degree from the University of Bologna, Bologna, Italy. He is currently an Associate Professor of electrical engineering with the University of Bologna. Since 1986, he has visited the Department of Electrical Engineering and Computer Science, University of California at Berkeley, for four years and the Department of Electrical Engineering, Massachusetts Institute of Technology, Boston. He has published more than 80 papers in various fields including numerical simulation of semiconductor devices, numerical solution of Maxwell’s equations, and parallel computation on massively parallel machines. Recently, his research has focused on integrated silicon systems to solve various problems such as optical and capacitive smart sensors, integrated digital circuits for speech and video processing, and analog circuits for fuzzy controllers. In 1998, he became Director of the Laboratory for Electronic Systems, a joint venture of the University of Bologna and ST Microelectronics for the development of innovative designs of systems on chip. Dr. Guerrieri received the IEEE Best Paper Award in 1992 for his work in the area of process modeling.