A Review of Nano-Electro-Mechanical System (NEMS) Based Memory

May 25, 2017 | Autor: Syifaul Fuada | Categoria: Computer Science, Memory Studies, Memory, NEMS, MEMS and NEMS
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A Review of Nano-Electro-Mechanical System (NEMS) Based Memory Syifaul Fuada [email protected]

Abstract: In this short article, we summarizes and discusses about recent progress in nano-electro-mechanical system (NEMS) based memory devices research which covers: theories, advantages and challenges.

phenomna. One of application the quantum effect is electronic device that use small structure, for example dot quantum or superlatic, (iii) The addition of new functions for existing system. It is not only to make the same material in a small size for increasing a density number, but also a birth of the new function when the atoms or molecules of different types arranged in a device system. Moreover, devices with small nanometer size generate supplementary interest for massive collective information processing and for building devices addressing the main limitation of dense digital computation with solid-state MOSFET switches. Therefore, the main rationale for a NEM switch is based on the added value in terms of functionality and performance for computing and storage compared to the solid-state nanometer MOSFET switch

I. INTRODUCTION NEMS (Nano Electromechanical Systems) comes from needs of an integrated system able to characterize the electro-mechanical systems at nanoscale. With this technology, will increase the speed of the computer, increasing data storage capacity, devices size will get smaller, and function of a specific devices in the future. Because, the electronic memory devices are increasingly expected to provide not only greater storage density, but also faster access to information. As storage density increases, however, power consumption and unwanted heat generation also increase, and the fidelity of accessing the memory is frequently diminished. NEMS is continuation of MEMS (Micro Electromechanical Systems), MEMS is a device that combines electrical components and mechanics in a single substrate. This device is made by adopting CMOS manufacturing process technology (Complimentary Metal Oxide Semiconductor), namely Deposition Process, Process Lithography and Etching Process [1]. NEMS have potential to enable revolutionary technology for these areas. Some Prospective applications of NEMS include RAM, Nanotweezers for miniaturized robotics, nano-injector (Fig 7) and other applications. MEMS applications in the field data storage have been widely used by microprocessor companies. Fig 1 is representing of data storage made by IBM company. It is has advatanges: (i) a tenth levels cheaper than RAM, (ii) Lower cost-entry point than disk $10-$30 for ~10 Gb, and (iii) Can be merged with DRAM & CPU[2]. The advantages above, can be developed through nanotechnology, so the device has: (1) work more efficient devices, (2) the level of power consumption will be lower, (3) cost of production becomes more affordable and size 10-3 times smaller devices. MEMS and NEMS are diverent, because: (i) Density number of device at NEMS is more than MEMS. For example, if one a transistor can developed smaller, the density number of transistor in same chip, automatically will more bigger than before. In developing LSI (large scale integrated), as far as possible the number of transistors in a chip could be propagated. (ii) bring up a quantum effect. Because if size of the material in nanometer scale, it will display a quantum

Fig 1. An example of MEMS applications in data storage developed by IBM[1]

The principle is hysteresis in the I-V characteristics due to different values of pull-in, Vpi (off–on transition) and pullout, Vpo (off–on transition) voltages. This last unique property suggests the possibility to use this device as a memory cell, with appropriate control of the hysteresis window and actuation voltages.

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White Papers This chapter reviews in nano-electro-mechanical (NEM) memory devices, it’is about (i) theories of NEMS, (ii) experiment results in world, (iii) advatanges and disadvatanges from other competitor, and (iv) opportunities and challenges NEMS in future.

for example is RAM (Random Access Memory). But nonvolatile data storage vice-versa. It keep going save the data although not electricity, for examle is the hard drive [4]. C. Switch Applications Devices NEM switch applications are diverse and put different constraints on the switch design and operation conditions, they can be categorized as it follows: (1) low-cycle NEM switch for power management and reconfigurable circuits, (2) intermediate-cycle NEM switch for static and nonvolatile memories, and (3) high-cycle NEM switch for highperformance logic circuit applications. The most demanding in combined scaling and performance is the logic switching, while the memory NEM switch specifications are of interest when addressing some of the open challenges of advanced nonvolatile memories [3]. In this paper is focus in memory devices only. D. Basic Operation Principles Nanoelectromechanical (NEM) switches are similar to conventional semiconductor switches in that they can be used as relays, transistors, logic devices and sensors. However, the operating principles of NEM switches and semiconductor switches are fundamentally different. These differences give NEM switches an advantage over semiconductor switches in some applications — for example, NEM switches perform much better in extreme environments — but semiconductor switches benefit from a much superior manufacturing infrastructure. Here we review the potential of NEM-switch technologies to complement or selectively replace conventional complementary metal-oxide semiconductor technology, and identify the challenges involved in the largescale manufacture of a representative set of NEM-based devices. Nanoelectromechanical switches work by using electrostatic forces to mechanically deflect an active element into physical contact with an opposing electrode, thus changing the state of the device. The electrostatic forces scale inversely with the square of the gap between the active element and the electrode, making them increasingly effective as devices get smaller. As the voltage applied across the active element and the electrode is increased, the resulting electrostatic forces are balanced by elastic restoring forces in the active element. When a critical ‘pull-in’ voltage is reached, the electrostatic forces overwhelm the restoring force: this causes the active element to accelerate towards the electrode, which closes the switch and leads to a sharp rise in the current through the device (which is usually much sharper than the rise seen in CMOS devices). After the switch has closed, elastic restoring forces in the deformed active element act to pull the switch open. Adhesive forces at the contact between the active element and electrode counteract this, holding the switch closed. If the elastic restoring forces are insufficient to break the adhesion when the electrical bias is fully removed, the switch will behave in a non-volatile manner, remaining in the closed state even when no input is applied (Fig. 2a). However, if the switch is designed such that the elastic forces

Fig 2. Current–voltage characteristics of a three-terminal NEM switch (a possible embodiment of the device is sketched on the left-hand side of the figure) compared to the MOS switch [3].

II. THEORIES A. Fabrication Method of NEMS The fabrication processes of NEMS devices can be categorized according to two approaches. Top-down approaches, which evolved from manufacturing of MEMS structures, utilize submicron lithographic techniques, such as electron-beam lithography, to fabricate structures from bulk materials, either thin films or bulk substrates, finally is etching. It is necessary to etch the thin films previously deposited or the substrate itself. There are 2 class of etching process, Wet etching and Dry etching. Wet Etching is is the simplest etching technology, There are complications since usually Mask is desired to selectively etch the material. It requires a container with a liquid solution that dissolve the material used. Some single crystal material, such as silicon, exhibits anisotropic etching in certain chemicals. The advatanges are Cost effectiveness, System integration, High Precision and Small size. Bottom-up approaches fabricate the nanoscale devices by sequential assembly of atoms and molecules as building blocks. Top-down fabrication is size-limited by factors such as the resolution of the electron-beam lithography, etchinginduced roughness, and synthesis constraints in epitaxially grownsubstrates. Significant interest has been shown in the integration of nanoscale materials such as CNTs and nanowires, fabricated by bottom-up approaches, to build nanodevices. Most of the nanodevices reported so far in the literature are obtained by “hybrid” approaches, i.e., combination of bottom-up (self assembly) and top-down (lithographic) approaches [11]. B. Data Storage According to physic characteristic, data storage can be classified into types, volatile and non-volatile. Volatile data storage is easy evaporate or missing of data if not electricity,

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White Papers of the deformed active element are sufficient to overcome the adhesive forces, the switch will be volatile and re-open when the applied bias is sufficiently reduced (Fig. 2b) [5].

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charge stored within the ONO layer is not used to store information; rather, it is used to shift the hysteretic gapclosing behavior of the BL in order to achieve nonvolatile storage, that is, two stable states under zero applied voltage. The amount of charge stored in the ONO layer is constant and can be introduced during or after fabrication (i.e., with a single charging operation). Based on simulations, the authors of NEMory cell reported 100 nm cantilever beams operating at 3 V within 0.4–4.0 ns response time and demonstrated that the most of the memory energy is consumed as electrical energy being much less than the one required in program/erase in conventional Flash memory cells. I think, there are many more of papers which discuss about new topology of NEMs.

(b)

Fig 3. Basic operating characteristics of NEM switches: (a) Volatile memory; (b) Non-Volatile

Figure 3 is due to switch movable electrode (Fig 2a). Current versus voltage for NEM devices exhibiting nonvolatile (a) and volatile (b) behaviour []. As the voltage is increased the current remains zero until the pull-in voltage is reached and the active element makes contact with the electrode (inset). The current then increases linearly with the voltage. However, when the voltage is reduced below the pullin voltage, adhesive forces between the active element and electrode hold them together and the current either decreases linearly with the voltage (a) or drops back to zero at a lower voltage when the stiffness of the active element overcomes the adhesive force (b). In general, stiffer active elements and larger gaps between the active element and the electrode favour volatile operation as they lead to greater elastic restoring forces in the deformed active element when the switch is closed. However, this comes at the expense of higher actuation voltages and a greater propensity for electrothermal failure modes. In contrast, more compliant active elements and smaller gaps favour non-volatile operation and lower actuation voltages. In either case, the balance of forces results in a current–voltage response that exhibits a characteristic hysteretic loop that can be exploited to achieve bistability, which is a basic requirement for various memory and logic devices (Fig. 2a,b) [5]. III. EXPERIMENT RESULT IN THE WORLD Actually there are a lot of results of experiments, but in this paper be explained one among the experimental results only. MEMS memory concept is the so called NEMory cell proposed in 2007 [6,7]. The NEMory cell consists of four elements (Fig. 4) a read word line (RWL) which serves as the upper electrode, a suspended bit line (BL) which is a movable mechanical beam, a dielectric oxide/nitride/oxide (ONO) stack which serves to store a fixed amount of charge, and a write word line (WWL) which serves as the lower electrode. Information is stored in the form of the BL position: If the BL is pulled down then the cell is in the “0” state; if the BL is released it is in the “1” state. It should be noted that the role of the charge-storage layer in a NEMory cell is distinctly different from its use in conventional Flash memory. The

(a)

cross-section of the device architecture featuring airgap, ONO stack and read, bit and write word lines

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qualitative characteristics of the fresh and charge-trap nitride

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experimental confirmation of both “fresh” and “charge-trapped” states Fig 4. NEMory concept

IV. REAL APPLICATIONS In general, data storege in NEMS technology is maturity. So, the knowledge and its applications can’t stability than MEMS. NEMS memory still in experimental and labolatory level. A remarkable NEM memory feature is their extremely low power consumption. Compared to their competitors like the NOR FLASH, PCM, and ionic memory, are:

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The NEM memories are able to operate with program/erase energies sub-10-16 J/operation [9]. A voltage operation in a memory cell has been recently reported to be smaller than 1V [10]. A NEM memory exploiting nonvolatile storage defined by a spatial configuration can offer extremely long term storage capability (much beyond the 10 year benchmark), which opens new specific application domains [3] Additionally, NEM memories can support logic information computing and storage that can operate under extreme conditions: high radiation doses (larger than MRads) and high temperature (larger than 200 °C), which makes them very interesting for applications in space, airborne, automotive and control instrumentation fields. This is one of the unique features of NEM memories because it can address ranges of temperature and harsh environment conditions where other conventional charge-based memories fail to retain data. Furthermore, in a recent work [8], the maximum operation temperature was reviewed for various NV memory technologies and concluded that M/NEM is the unique technology offering storage performance at temperatures higher than 200 °C (Fig. 5)

Fig 6. Comparing the performance of NEM technology with CMOS and other emerging technologies.

V. OPPORTUNITIES AND CHALLENGES The opportunities are: Power savings beyond the capabilities of all known nonvolatile memory competitors (PCM, FLASH, ionic memory, RRAM). The zero-Ioff current of hysteretic NEM relays or the shift induced in the NEM hysteretic I-V characteristics by various charge storage mechanisms coupled to a NEM structure can be smartly exploited in bi-stable memory architectures to achieve energies per bit program/erase close to 10 -17 J, which is lower than for any other NV memory candidates [4]. High robustness in harsh environments (high temperature and high radiation). By their nature a nonvolatile M/NEM memory cell is one of the most robust memory architectures for preserving the stored information in very harsh environments; their figures of merits in this respect are unmatched [4]. Voltage scaling below 2 V and switching time below 10 ns. The voltage scaling of electrostatic actuation imposes aggressive scaling of the actuation air gaps down to tens of nm. However, the recent nanostructure cells based on movable fins show that reasonable voltage scaling can be experimentally achieved in structures with gaps higher of the order of 10 nm. In bi-stable structures switching voltage scaling down to 2V was suggested with realistic technology and switching times sub10 ns [4]. The challenges are: Reliability. The understanding of the main mechanisms for failures and specific accelerated reliability tests should be further defined and investigated for NEM devices in general. However, significant technical progress in the field of NEM switches, showing high reliability after specific surface engineering could be also applied to the NEM memory cells. This issue can be solved in the near future [4]. Need of adapted packaging (zero-level and wafer-level) with controlled ambience (hermetic). Many of the reported NEM memory devices have been tested in laboratory

Fig 5. Maximum operation temperature of various NV memory technologies pointing out that M/NEM memories are the only solution for high temperature (> 200 °C)

In other side, The 2009 edition of the ITRS1 compared NEM devices with several types of MOSFETs (metal–oxide– semiconductor field-effect transistors) in terms of eight parameters including performance and energy efficiency. Relative performance improves with distance along the radial axis. Although NEM switches compete well in terms of energy efficiency, CMOS compatibility and operational temperature, their reliability and scalability need to be improved (Fig.6)

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White Papers conditions (vacuum of ambient air) and would require aprotective thin film (zero-level) and wafer-level packaging for real applications. The integration of NEM memory as a backend of line module would simplify greatly the packaging limitations in the future; this issue can be solved in the near future [4]. Reproducible and routine nanomanufacturing: Fabrication reproducibility is key in applications such as mass sensors. Since the NEMS can respond to mass at the level of single atom or molecules, it places an extremely stringent requirement on the cleanness and precision of nanofabrication techniques. Likewise, devices that rely on van der Waals energy require dimensional control (e.g., gap dimension) on the order of a few nanometers [11]. Quantum limit for mechanical devices: The ultimate limit for NEMS is its operation at, or even beyond, the quantum limit. In the quantum regime, the individual mechanical quanta are of the same order of magnitude as or greater than the thermal energy. Quantum theory should be utilized to understand and optimize force and displacement measurements. Recently, position resolution with a factor of 4.3 above the quantum limit was achieved for a single-electron transistor with high quality factor at millikelvin temperature. The pursuit of NEMS devices operating at the quantum limit will potentially open new fields in science at the molecular level [11].

nodes, as a generic domain, where energy-efficient technologies offering substantial power savings could prevail. REFERENCES [1]. Dequesnes, M., S V Rotkin and NR Aluru (2002), Calculation of pull-in voltages for carbon-nanotube-based nanoelectromechanical switches. Nanotechnology 13 (2002) 120-131: Institute of Physics Publishing. PP.120. [2]. MEMS dan NEMS applications, Available at http://www.owlnet.rice.edu/~phys534/notes/week07_lectures.pdf [3]. Didik Dwi Prasetya, Teknologi Penyimpanan Data. Available at http://komunikasi.um.ac.id/?p=11580. [4]. Adrian M. Ionescu (2014). Nano-Electro-Mechanical (NEM) Memory Devices Emerging Nanoelectronic Devices. John Wiley and Sons Ltd. PP 123-135. [5]. Owen Y. Loh and Horacio D. Espinosa (2012). Nanoelectromechanical contact switches. Macmillan Publishers Limited :Nature Nanotechnology, Vol 7, May 2012. PP. 283 – 295. [6]. Choi, W.Y., Osabe, T., and Liu, T.-J.King. (2008) Nano-electromechanical nonvolatile memory (NEMory) cell design and scaling. IEEE Transactions on Electron Devices, 55(12), 3482–3488. [7]. Jang, W.W., Lee, J.O., and Yoon, J.B. (2007) A DRAM-like mechanical non-volatile memory, Proceedings of Conf Solid-State Sens & Actuat, 153–156. [8]. Pott, V., Geng Li, Chua, Vaddi, R. et al. (2012) The shuttle nanoelectromechanical nonvolatile memory. IEEE Transactions on Electron Devices, 59(4), 1137–1143. [9]. Liu, T.J. King. (October 9th 2009) Micro-Electro-Mechanical Memory Technology for Energy-Efficient Electronics, EE298-12 Seminar, UC Berkeley. [10]. Lee, J.O., Song, Y.-H., Kim, M.-W. et al. (2013) A sub-1-volt nanoelectromechanical switching device. Nature Nanotechnology, 8, 3640. [11]. Horacio D. Espinosa and Changhong. Nanoelectromechanical Systems – Experiments and Modeling. PP. 137.

VI. CONSLUSSIONS In general, it important to note that NEM memories can have better speed and much lower energy than conventional flash memory, being co-integrable with CMOS. This observation could lead to the identification of some interesting future opportunities and applications of NEM memories in mobile communications or internet of things

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