Template synthesis of carbon nanotubes from porous alumina matrix on silicon

Microelectronic Engineering 83 (2006) 2432–2436 www.elsevier.com/locate/mee

Template synthesis of carbon nanotubes from porous alumina matrix on silicon R. Gras

a,b,c,*

, J.L. Duvail b, T. Mine´a c, M. Dubosc a,c, P.Y. Tessier c, L. Cagnon d, P. Coronel a, J. Torres a b

a STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles, France Laboratoire de Physique des Mate´riaux et Nanostructures, IMN, Nantes, France c Laboratoire des Plasmas et des Couches Minces, IMN, Nantes, France d Laboratoire de Cristallographie, Grenoble, France

Available online 20 October 2006

Abstract The extreme properties of carbon nanotubes (CNTs) make them a good candidate for advanced interconnects to achieve the performances required for the new generation of integrated circuits (ICs). However, the integration of CNTs in microelectronics devices requires the development of a technique allowing the control of the morphology of CNTs. In this paper, we report on a simple technique to vertically integrate CNTs on silicon substrate via porous alumina thin films. The process follows four steps: (i) aluminium thin films deposition on Si substrate, (ii) anodic oxidation generating an alumina template with vertical and cylindrical nanopores (/ < 40 nm), (iii) electrodeposition of metal catalyst on Si substrate at the bottom of the pores, and (iv) CNTs growth inside as-formed nanopores by a PECVD technique. It was demonstrated that the quality of the aluminium thin layers is crucial for the control of the oxidation step. Then, the experimental parameters of anodic oxidation (voltage, electrolyte, one or two steps oxidation process, etc.) were tuned to modulate the porosity (pore diameter and density) of the as-formed alumina. The growth of CNTs inside the alumina matrix shows a direct relationship between CNTs morphology and nanopores one.  2006 Elsevier B.V. All rights reserved. Keywords: Carbon nanotubes; Anodic alumina; Template; Aluminium thin layers

1. Introduction Since they have been discovered by Iijima [1], carbon nanotubes (CNTs) have attracted an enormous interest as nano-objects for fundamental studies as well as nanospears of ultra-miniature devices. In fact, CNTs have extraordinary electrical [2–5], mechanical [6,7] and thermal properties, which make them interesting for nano-engineering and nanoelectronics applications. In particular, Fig. 1a illustrates the integration of a metallic CNT as an ideal material for future generations of vertical interconnects, i.e. vias. Indeed, CNTs can overcome many existing chal*

Corresponding author. Address: STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles, France. Tel.: +33 4 38 92 28 18. E-mail address: [email protected] (R. Gras). 0167-9317/$ - see front matter  2006 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2006.10.051

lenges for Cu interconnects at these critical dimensions: for instance, CNTs can sustain current densities hundreds of time higher than bulk metals [8], few-walled nanotubes have a very low resistance due to ballistic transport [9,10], and they prevent electromigration failure. In addition, CNTs thermal conductivity is higher than the large majority of crystalline materials [11]. For electronic applications, CNTs synthesis must be highly controlled to address specific features, such as positioning, morphology, growth direction. However, conventional techniques for CNTs fabrication mainly based on laser ablation, arc discharging and chemical vapour deposition (CVD) produce CNTs with a spread distribution of diameters and lengths and consequently of their physical properties. Even if they have a single graphene sheath, so-called single wall CNTs (SW-CNT), it has been shown

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Fig. 1. (a) Schematic representation of CNT as via interconnection between two Cu lines and (b) process steps of the integration of CNTs on Si using alumina templates.

that SW-CNTs can be either metallic or semiconducting, depending on their chirality and diameter [12,13]. In addition, the synthesis temperature has to be below 400 C to be compatible with the microelectronic standards. Hence, a process that can fulfill all above requirements is still challenging the successful integration of CNTs into electronic devices. A simple and effective method to control the position of CNTs as well as their diameter and growth orientation uses templates. Several techniques are known to realize nanometric templates, but among them the anodic alumina is one of the most convenient. It is attractive since it is lowcost and it allows the control of pores diameters over a quite large range [14–16]. It has been shown that this kind of alumina is composed of two parts: a porous area at the interface between the electrolyte solution and alumina and a thin oxide layer at the interface alumina/aluminium, called barrier layer [17]. Moreover, the nanopores formed by this process can be self organized into highly ordered hexagonal array under precisely controlled experimental conditions [18,19]. For electronic applications, it is important to note that, after the CNTs growth inside the pores of alumina, the template can be easily removed by its dissolution in diluted NaOH preserving the CNTs unaffected [20]. In this paper we report on a simple technique to vertically integrate CNTs inside porous alumina thin films processed on a Si microelectronic quality wafer without any barrier layer. The process follows three steps (Fig. 1b): (1) Aluminium deposition as a thin film on Si substrate, (2) Anodic oxidation generating alumina template with vertical and cylindrical nanopores, (3) Metal catalyst electrodeposition through the pores on the Si substrate and CNTs growth inside as-formed pores. The optimized way to control each one of these process steps are given below. 2. Experimental section In order to optimize the Al thin films deposition conditions, two different techniques were studied. First was the thermal evaporation by Joule effect of high purity Al and the second one was plasma sputtering. For sputtering we

used a planar magnetron reactor with Al target (3 in. diameter) working at 150 W in radio frequency range (13.56 MHz). The plasma was generated in argon at 20 mTorr. The substrate biased to control the quality of the deposited thin layers and its effect on the Al film was studied. The anodic oxidation of Al films was performed in a solution of oxalic acid (0.3 M) at room temperature. The electrical contact at the anode was taken on the backside of the silicon substrate. Dc voltage was applied using platinum as counter electrode and the anodized surface was about 1.8 cm2. The synthesis of CNTs was realized by plasma enhanced chemical vapor deposition (PECVD). This method needs a catalyst which is generally a transition metal. The chosen catalyst was an ultra thin layer of nickel electrochemically deposited at the bottom of the alumina nanopores from a solution of NiSO4 (0.2 M) and H3BO3 (0.5 M), the deposition time was a few seconds. The plasma for CNTs growth is generated by electron cyclotron resonance (ECR) in mixture of C2H2/NH3 (1:2) at 1.4 mTorr [21] for the substrate temperature of 700 C. 3. Results and discussion 3.1. Deposition of Al thin layers The Al layers made by thermal evaporation gave satisfying results when the anodic oxidation was performed (see later Fig. 4). However the sputtering technique was preferred because the characteristics of the deposited Al thin films appear easier to control and more reproducible compared to the thermal evaporation. More precisely, using the sputtering method, the surface roughness of the Al layer can be controlled by the polarization applied on the substrate during the deposition. Fig. 2a (AFM top-view) illustrates that very smooth surfaces of Al with roughness as low as 1.41 nm can be achieved with sputtering conditions described in the experimental section. In this case, the silicon substrate was biased at 5 V. Such high purity Al films have a polycrystalline texture with the dominant phase fol-

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Fig. 2. (a) AFM top-view showing the smoothness of the surface of sputtered Al thin layer (roughness = 1.41 nm) and (b) XRD analysis of a high quality sputtered Al thin film.

lowing the plane [1 1 1] (Fig. 2b). The crystalline orientation of grains in the Al film is dependent of the substrate applied bias so it can be controlled by the external sputtering parameters. 3.2. Characterization of nanopores obtained by anodic oxidation To perform the complete oxidation of the aluminum layer, the duration of the anodisation step has to be precisely monitored on the oxidation current versus time graph. A typical curve is shown on Fig. 3a. The alumina formation reaction starts at A point. The decrease of the current from A to B is attributed to the alumina barrier layer formation and to the initiation of the nanopores. Then, the propagation of the pores corresponds to the constant part of the curve (point B to C). The small increase in the current from C to D corresponds to the opening of the pores on silicon and so to the dissolution of the alumina barrier layer. Finally the current density decrease due to the formation of the silicon oxide layer at the interface between alumina and silicon. This interfacial layer yields to the alumina detachment from the substrate. One can easily see that this type of curve can be used to manage the oxidation period and consequently to stop the anodisa-

tion precisely when the pores attend the substrate (on point D). Knowing the initial thickness of aluminum, it is easy to estimate the porous alumina rate formation. For example, the pore propagation rate is evaluated to 2 nm/s for an Al layer deposited by sputtering and oxidized in oxalic acid (0.3 M) at 60 V (Fig. 3a). This rate decreases, as expected, for a smaller concentration of the electrolyte solution. However, it increases the precision of the process stoppoint. Fig. 3b illustrates the linear variation of the average pores diameter versus applied voltage. So, in these experimental conditions, the pores’ diameter can be tuned at least in a range from 15 to 40 nm. Two examples of alumina template synthesized by anodic oxidation are presented. On one hand, Fig. 4 shows the result obtained from an Al thin layer (roughness: 2.23 nm) deposited by thermal evaporation. For 40 V applied voltage, the average pore diameter is about 15 nm and the pore density is estimated to be 1.4 · 1010 cm 2 corresponding to a porosity of 2.4%. The thickness of the alumina template is 140 nm (Fig. 4b). On the other hand, anodized Al sputtered film is depicted on the Fig. 5. For 120 V applied voltage, the resulting porous layer has the average pore diameter of 40 nm, the pore density of 5.1 · 109 cm 2 corresponding

Fig. 3. (a) Typical characteristic of the current density versus time corresponding to the formation of porous alumina by anodic oxidation of Al film on silicon substrate and (b) pores diameter versus anodisation voltage.

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Fig. 4. SEM images of a porous alumina template anodised from evaporated Al film (a) top-view and (b) cross-section view.

Fig. 5. SEM images of a porous alumina template anodised from sputtered Al film (a) top-view and (b) cross-section view.

to a porosity of about 6.4% (Fig. 5a). The alumina film has a thickness of about 300 nm (Fig. 5b). From the analysis of the Figs. 4a and 5a, the pore nucleation appears to be directly dependent on the aluminium surface morphology: the pores initiate preferentially on defects or grain boundaries of the Al layer. It follows that the pore formation is mainly related to the Al deposition conditions and film microstructure. In particular, smooth Al surfaces are required to get homogeneous pores features. 3.3. Filling of the pores by CNTs The alumina template used for the synthesis of CNTs has the pore diameter and length of about 15 and 140 nm, respectively (Fig. 4). Fig. 6a shows high quantity CNTs vertically oriented on the Si substrate. From the transmission electron microscopy images (Fig. 6), one can estimate the average diameter of CNTs of 15 nm, that is very close to the pores one. Hence, the parallel orientation and the small dispersion in diameters are due to the template effect of the porous alumina membrane. The dark particles located at the top of the CNTs are of nickel catalyst indicating the tip-growth mode of CNTs. High-resolution TEM imaging of CNTs shows the parallel and equidistant pattern corresponding to many graphene walls (the inter-fringes distance

Fig. 6. TEM cross-section of CNTs synthesized in the alumina template characterized in Fig. 4 (a) overview and (b) zoom on graphene walls.

is estimated to be 0.35 nm: Fig. 6a). The synthesized CNTs are multi-walled and consequently they have a metallic behavior making them interesting for interconnect applications. Electrical characterization of these CNTs is now under investigations. 4. Conclusion To summarize, we succeeded the vertical integration of CNTs on silicon wafers. The diameter of PECVD grown

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CNTs is found close to the average pore diameter, about 15 nm, demonstrating the guiding role of the alumina membrane. Successful growth of CNTs validate also the electrochemical technique for the catalyst deposition into the pore on the Si substrate, without barrier layer. Consequently, the template method appears to be a reliable technique to optimize CNTs growth process into nano-pores. Concerning the alumina template, it was shown that anodization process requires high quality deposited Al thin layers, smooth and compact. Thus, CNTs appears as a very promising material solving the current challenges for advanced interconnects and one step of its incorporation in Integrated Circuits was realized here. References [1] S. Iijima, Nature 384 (1991) 56. [2] R. Saito, G. Dresselhaus, M.S. Dresselhaus, Physical Properties of Carbon Nanotubes, Imperial College Press, 1998. [3] W.A. de Heer, A. Chatelain, D. Ugarte, Science 270 (1995) 1179. [4] W. Zhu, C. Bower, O. Zhou, G. Kochanski, S. Jin, Appl. Phys. Lett. 75 (1999) 873. [5] S. Fan, M.G. Chapline, N.M. Franklin, T.W. Tombler, A.M. Cassell, H. Dai, Science 283 (1999) 512. [6] M.M.J. Treacy, T.W. Ebbesen, J.M. Gibson, Nature 381 (1996) 678.

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