A comprehensive phase-spectrum approach to metrological characterization of hysteretic ADCs

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A Comprehensive Phase-Spectrum Approach to Metrological Characterization of Hysteretic ADCs Conceição Líbano Monteiro, Pasquale Arpaia, and António Cruz Serra

Abstract—A phase-spectrum-based approach to the dynamic characterization of hysteretic analog-to-digital converters is proposed. Analytical relations between hysteresis of the dynamic transfer characteristic and out-of-phase components of the output Fourier spectrum are given. On this basis, an error model, a figure of merit, and a procedure for dynamic hysteresis testing are presented. Results of numerical characterization and experimental validation tests highlight the practical effectiveness of the proposed approach and its suitability for standardization. Index Terms—analog-to-digital converter (ADC), hysteresis, phase spectrum, testing.

I. INTRODUCTION

A

SSESSING dynamic performance of the key component of advanced digital instrumentation, the analog-to-digital converter (ADC), is still an open challenge [1], [2]. More comprehensive approaches to the ADC error, such as phase-plane and code-previous code ones [3]–[7], are still ignored at the standardization level. As an example, under a sinusoidal stimulus, the dynamic transfer characteristic may exhibit hysteretic behavior (e.g., due to an imperfect match of differential input channels) [3], [8]–[11]. However, neither the IEEE 1057-94 Standard [12] nor the drafts IEEE 1241 Standard [13] and DYNAD CENELEC [14] address this problem, and limit their scope to static hysteresis. In fact, the histogram test (or “code-density test”) [8], [9], [12]–[16] measures the transfer characteristic by averaging the number of times each code is hit by a sine wave without taking into account the input signal slope. In the case of hysteresis, the two different branches of the transfer function, for the negative and the positive input slope, are confounded. In literature, a bidimensional (2-D) modified histogram test was devised; two separate histograms are built over the positive- and negative-slope half cycle of the test signal [4], [9], [17]. A large amount of experimental data has to be collected and two actual transfer functions have to be estimated [11], [18], [19]. As an alternative, the authors proposed a more efficient Fourier-based test [11]. However,

Manuscript received May 29, 2001; revised April 30, 2002. This work was supported by the Portuguese research project “New measurement methods in analog to digital converters testing,” reference number PCTI/ESE/32698/1999. C. L. Monteiro and A. C. Serra are with the Telecommunications Institute and Department of Electrical and Computer Engineering, Instituto Superior Técnico, Technical University of Lisbon, Lisbon, Portugal (e-mail [email protected]; [email protected]). P. Arpaia is with the Facolta Di Ingegneria, Universita del Sannino, Benevento, Italy ([email protected]). Digital Object Identifier 10.1109/TIM.2002.803303

Fig. 1. Actual ADC model underlying the proposed approach.

theoretical analytical backgrounds of dynamic hysteresis, as well as a suitable error model, were not set up. In this paper, a comprehensive phase spectrum-based approach to the characterization of ADC dynamic hysteresis is proposed. Analytical relations between the output phase spectrum and the hysteretic nonlinearity are provided. On this basis, an ADC error model, a figure of merit, and a measurement procedure are proposed, characterized, and validated by numerical and experimental tests. II. THE PROPOSAL In this section, i) the basic ideas underlying the proposed approach, ii) a behavioral model of the hysteretic ADC, iii) the analytical backgrounds, iv) the hysteresis figure of merit, and v) a measurement procedure are presented. A. Basic Ideas The proposed approach is based on two main basic ideas: i) the relation between hysteresis and output phase spectrum and ii) the decomposition of ADC nonlinearity in hysteretic and nonhysteretic components. Relation Hysteresis/Phase Spectrum: Let an actual generic -bit ADC be modeled as in Fig. 1. The nonlinear block accounts for all dynamic nonlinearities, including hysteresis, while the ideal ADC accounts for sampling and quantization effects. Without hysteresis, the branches of the transfer charand , for positive and negative input slope, acteristic, , where is the input respectively, coincide: sine wave, normalized here for the sake of the simplicity as . The corresponding periodic distorted wave can be described by the -term Fourier series

0018-9456/02$17.00 © 2002 IEEE

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where is the dc component and and are the amplitude and phase of the th harmonic component, respectively. The error globally introduced by the nonlinear block is

(2) In Fig. 2(a), the behavior of a nonhysteretic actual ADC is il, symmetric cosine lustrated. For rising and falling edges of and , give rise to the same input arguments, such as in , produce the same output and, therefore, also value . Thus, depends only on the input the same error value amplitude, not on the slope. Furthermore, both the output and the error are even functions [Fig. 2(a)]. Hence, in the , all of the harmonics are even (cosine) Fourier series of functions [18]

(a)

(3)

where the positive or negative sign on the th harmonic accounts , or , respectively. Therefore, a necessary and for sufficient condition for a nonhysteretic behavior of the ADC is (4) . For Analogous considerations can be made for the error is defined as “in-phase” distorthis reason, in this case, tion, which occurs if and only if the ADC has a nonhysteretic behavior. In Fig. 2(b), the behavior of an ADC with symmetric hysteresis is considered. In this case, symmetric cosine arguments, and , giving rise to the same input , do such as in not produce the same output value. Owing to the symmetry of give rise to two the hysteresis, the input values and , shifted of the same quantity, different values, but with opposite signs, with respect to their same ideal value . This imposes an odd symmetry on the error funcequal to [Fig. 2(b)]. Hence, in the Fourier series of , all of tion and the harmonics are odd (sine) functions. As the sum of , can be expressed, in this case, as

(b) Fig. 2. Effect of (a) nonhysteretic and (b) symmetrical hysteretic distortion on y (t) and "(t) functions.

Fig. 3. Hysteresis functions y and y differential-mode functions y and y .

(5) Here, the positive or negative sign on the amplitude of the th or , respectively, harmonic accounts for , , whose except for the amplitude of the first harmonic of , sign depends on . The first harmonic of , results from the sum of and the first harmonic of . , arguments of the Fourier Consequently, and , , verify the condition Series of AND

(6)

and corresponding common- and

which is a sufficient and necessary condition for symmetric hysteresis. In this case, all of the error harmonics are “out of phase” with respect to the input signal. For this reason, the introduced error is an “out-of-phase” distortion, occurring if and only if the ADC has symmetric hysteresis. Hence, hysteresis is directly re. lated to the phase spectrum of The combination of the two cases above allows the generic asymmetric hysteresis to be described. If condition (4) is not met, hysteresis is present. Moreover, unless condition (6) is met, the hysteresis error will be asymmetric. ADC Nonlinearity Decomposition: In Fig. 3, a generic asymmetrical hysteretic characteristic of the nonlinear block of Fig. 1 is represented by a thin line. It is defined by a two-branch

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function, swept alternately with positive, and negative, , input signal slopes. Such as the gain of an actual differential amplifier, this function can be decomposed into a “common-mode” component (7) and a “differential-mode” component (8) both of them represented in Fig. 3 by thick lines. From the only accounts for nonfigure, it can be argued that is uniquely responsible for hysteretic behavior, while symmetric hysteretic behavior. The combination of both of these models a generic asymmetric hysteretic behavior. In particular, for nonhysteretic behavior, given the coincidence and , the component is of the branches carries all of the nonlinear inforidentically null, while mation. Conversely, in the presence of symmetric hysteresis, assumes the ideal value , while the the component . nonlinear information is totally contained in From (7) and (8), the original branches can also be extracted

(9) and allow the nonlinIn this way, the functions earity type, nonhysteretic and symmetrically hysteretic, respectively, to be discriminated in the univocal way.

Fig. 4.

Proposed ADC model.

and substituted in (1), giving rise to

(11) This allows the two-branch transfer characteristic of the hysteretic ADC to be determined directly from the output spectrum. By substituting (11) in (7) and (8), the common- and differential-mode nonlinear components are derived on the basis of simple trigonometric considerations

B. ADC Model and also provide an alternative The functions model for hysteretic ADCs (Fig. 4). In this model, the total nonlinear behavior is split into two independent components: common- (nonhysteretic) and differential-mode (hysteretic). as Their joined action results in the total distorted wave and the sum of the corresponding independent signals , respectively. The former, , is only affected by an “in-phase” distortion (i.e., nonhysteretic), while the latter, , only suffers “out-of-phase” distortion (i.e., symmetriwill cally hysteretic). Moreover, according to Fig. 2(a), will be be an even function. Conversely, as in Fig. 2(b), is applied to the ideal an odd function. Finally, the wave -bit ADC, responsible for sampling and quantization effects and produces the distorted output sequence .

(12) The above expression allows the type and the amount of the induced nonlinear behavior to be analyzed in terms of its hysteretic nature directly from the output spectrum. From (12), the outputs of the two nonlinear blocks of the and can be obtained by expressing model in Fig. 4, as the time function

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C. Analytical Backgrounds In the following, analytical relations between the output signal spectrum and i) the nonlinear behavior, ii) the distorted , and iii) the standard integral nonlinearity (INL) signal [12], are derived in the case of a sinusoidal input. First, expressions for the nonlinear model functions and are determined. With this aim, the quantity is expressed as a function of , for positive and negative slopes

(10)

is given by the sum of the above functions Eventually, [see equation (14) at the bottom of the next page]. and , the INL can be computed, as Finally, from shown in [11]. According to the ADC quantization in the model and when the distorted wave of Fig. 4, the instants crosses the ideal transition level with positive and negative slope, respectively, are found (15)

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The actual transition levels and correspond to the assumes at those instants and [11] values the input (16) and , for positive and negative slopes, The and are obtained from the respective transition levels . These integral nonlinearity components are related to the common- and differential-mode ones by

(17) Expression (17) is a direct extension of the IEEE Stancorresponds to the dard 1057-94 [12]: The standard of the total INL of the common-mode component hysteretic converter. In this way, the standard information can , which contains the be profited and completed with information on the hysteretic behavior. D. Figure of Merit The proposed ADC model and (13) show that the odd comof the distorted signal only accounts for the ponent hysteretic error. Consequently, as the hysteresis figure of merit, the signal to hysteretic distortion ratio (SHDR), relating the with the power associated power associated with the input , is proposed for standardization purposes. to can be calculated easily through the harThe power of . In the complex plane, each harmonic monic content of and imaginary is decomposable in its real parts, accounting for the “in-phase” or nonhysteretic distortion and “out-of-phase” or hysteretic distortion, respectively. Moreover, in terms of the Fourier series development (13), the th real coefficient corresponds to the signed , whereas the imaginary amplitude of the th harmonic of part is the symmetric of the signed amplitude of the th har. On this basis, the SHDR results in monic of

(18) The condition is equivalent to (4), corresponding, as expected, to the absence of hysteresis. E. Test Procedure In Fig. 5, the main steps of the procedure for computing the ADC model functions, and , the hysteresis figure of merit,

Fig. 5. ADCs.

Test procedure for the metrological characterization of hysteretic

SHDR, as well as the actual transition levels, and and the integral nonlinearity components and , are shown. • Preliminarily, samples of a reference sine wave , with offset and amplitude , are collected into the record , according to the standard (fast Fourier transform) FFT coherent sampling test and method [12]. As for the standard histogram test, values must be known. In this way, only the initial phase of the input wave, , remains unknown. An FFT is then performed on the record of samples , in order to extract the values of amplitude and phase of the th harmonic component of the reconstructed output signal (Fig. 5). is estimated. is different from of the fun• Next, damental harmonic of due to the hysteresis effect [18]. In case of monotonic branches of the transfer function of the ADC, the minimum and maximum values of and occur at the same instants in time, and , respectively. The instants and can be found through an optimization algorithm applied to the previously obtained. The initial analytical function phase can be determined as (19)

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(a)

(a)

(b)

0

Fig. 6. Imposed model functions (a) y (x) y (x) (coincident for all of the three ADCs) and (b) y (x) (null line: ADC1, dotted line: ADC2, solid line: ADC3).

where and are the values of the input phase and , respectively. This estimacomputed from tion method is presented in full detail by the authors in [11]. The arguments are then normalized as , which corresponds to translate the time reference in 0. In this way, order to make null the input phase at , bethe phase-normalized input, comes an even (cosine) function and the respective phase, is derived through (1). normalized output, and • At this point, the ADC model functions and the SHDR are calculated through the “ADC Model Identification” branch of the procedure (Fig. 5). These can be directly obtained from (12) and (18), since , , and are known. As the input amplitude, and offset are not normalized, the argument of the model funcby tions is related to the instantaneous input value . • The knowledge of and allows actual and , as well as and , to be computed by (15), (16), and (17), respectively, through the corresponding steps of the “INL Measurement” branch of the procedure (Fig. 5) [11]. III. NUMERICAL RESULTS In the following, results of simulation tests designed to highlight i) the working of the proposed approach and (ii) the validation of the model are reported. With this aim, three 12-b ADCs (ADC1, ADC2, and ADC3) and were modeled resorting to suitably different functions (Fig. 6). For this purpose, polynomials of the 20th degree were exploited. In Fig. 6(a), the imposed common-mode model , identical for all of the three ADCs, is reprefunction sented, for the sake of the clarity, in terms of its difference from . In Fig. 6(b), the straight ideal transfer characteristic, are reported: i) for ADC1, three macroscopically different

(b)



Fig. 7. (a) Real and (b) imaginary part of the three ADCs output spectra ( : ADC1, o: ADC2, : ADC3).

3

(a)

(b) Fig. 8. Model estimation rms error on (a) output y , (b) common-mode IN L , and (c) differential-mode IN L (dashed line: ADC1, thin line; ADC2, thick line: ADC3).

identically null, and ii) for ADC2 and ADC3, with a relation between maximum values surrounding 10. For the test procedure, sine waves with the same amplitude equal to 98% of the full-scale, all sampled coherently on 16 384 points and output harmonics were spectra identically identified through considered in order to estimate all the ADC models under the same conditions. The working of the proposed approach is highlighted in Fig. 7 by comparing the output spectra obtained for the 3 ADCs stimulated by the same sine wave. In particular, in Fig. 7(a), the same trend can be observed on the real part spectra of all of . Conversely, the three ADCs, owing to the same imposed in Fig. 7(b), three different imaginary part spectra (identically for ADC1) can be noticed, congruently with the three . Furthermore, the three corresponding different imposed , values of SHDR have been obtained: dB and dB. The validation of the model was carried out for several values of normalized input frequency on each of the three ADCs i)

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(b) Fig. 9. Experimental (a) IN L and (b) IN L (thin line: 2-D histogram; thick line: proposed model) for an input sine wave at 1.793 kHz.

by estimating the model functions, and , as well and as the associated integral nonlinearity components, , through the proposed procedure of Section II-E, ii) by through both the imposed, converting the same input and and the estimated distorted components, and , in order to obtain the actual and estimated output sequences, and iii) by computing the root mean square (rms) of the errors on the corresponding and INL estimation. The obtained results are reported in Fig. 8, where, for each ADC, the rms values of the estimation errors are highlighted as a function considered for the model idenof the number of harmonics tification. The trends of the estimation errors on both output sequence [Fig. 8(a)] and integral nonlinearity components, [Fig. 8(b)] and [Fig. 8(c)] reveal a satisfying performance of the model for all the imposed hysteretic behavior, once the is conveniently chosen. The choice of value is a value of trade-off related to the necessity of including all the significant harmonics without accounting for those dominated by random noise. IV. EXPERIMENTAL RESULTS The proposed approach was validated also in experimental conditions on a Tektronix VX4240 12-bit pipelined-flash digitizer, with a full scale of 2.0 V and a maximum sampling frequency of 10 MS/s, revealing dynamic hysteresis dependent on the input frequency. A Stanford Research DS360 calibrated sine wave generator was used as reference. With this aim, i) a comparison with the 2-D histogram [4] and ii) the hysteresis compensation analysis were carried out. Comparison experiments showed an agreement between the results of the INL computed through the literature two-dimensional (2-D) histogram [4] and the proposed model in optimum working conditions for both of them. A first example

is reported in Fig. 9, for an input sine wave with 98% of full-scale amplitude and 1.793 kHz, coherently sampled at 10 MS/s. The integral nonlinearity components and were derived through the 2-D histogram, using a set of 16 records of 262 144 samples each and the proposed test procedure applied to only one of the obtained records, with . In Fig. 9(a), the values computed by the 2-D histogram (thin line) and the proposed test procedure (thick line) are practically coincident. Fig. 9(b) shows analogous . Under these conditions, a negligible agreement for the hysteresis can be detected, for a corresponding SHDR of 75 dB. A second example, under similar test conditions but for an input signal of 50.697 kHz (Fig. 10), highlights a similar has not agreement. Furthermore, Fig. 10(a) shows that significantly changed with the input frequency. Conversely, a visible increase on the dynamic hysteresis phenomenon can in Fig. 10(b) for a corresponding be detected from the SHDR of 64 dB. This also makes clear the ease of dynamic hysteresis interpretation by the proposed approach. The practical use of the proposed approach has been highlighted by the hysteresis compensation on 30 sine wave signals with amplitude of 98% of full scale, within a frequency range from 500 Hz to 200 kHz. The values of the figures of merit SHDR and THD [13], based on the second to tenth harmonic components, were calculated before and after the compensation and values were obtained through procedure. The seven calibrated input sine waves acquired under experimental conditions analogous to those referring to Figs. 9 and 10. In Fig. 11(a), the original SHDR trend (thin line) confirms that the hysteresis effect tends to worsen with frequency. After compensation (thick line), the average increase of about 12 dB on SHDR values highlights a significant improvement on hysteretic behavior. Similar analysis can be made on THD values reported in Fig. 11(b), where the compensation procedure reaches,

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(b) Fig. 10.

Experimental (a) IN L and (b) IN L (thin line: 2-D histogram; thick line: proposed model) for an input sine wave at 50.697 kHz.

The proposed approach is wide-ranging and can be applied to the characterization of other hysteretic instruments and generic devices, such as magnetic transducers and dielectric materials. Future work will be devoted to study possible extension of the proposed approach to the phase-plane error mapping and error correction. (a)

(b) Fig. 11. Experimental (a) SHDR and (b) THD (thin line: uncompensated, thick line: compensated signal).

on average, a fair decrease of about 5 dB on the THD (thin line: uncompensated, thick line: compensated values). V. CONCLUSION An approach to the metrological characterization of ADC dynamic hysteresis has been proposed to integrate existing Standards [12]–[14]. The approach has been based on theoretical relations between the output phase spectrum and the hysteretic nonlinearity. In this outline, a complete framework for metrological characterization was defined: a nonlinear model, a figure of merit, and a measurement procedure were proposed, as well as numerically and experimentally characterized and validated.

REFERENCES [1] P. Arpaia, F. Cennamo, and P. Daponte, “Metrological characterization of analog-to-digital converters—A state of the art,” in Inst. Elect. Eng. Advanced A/D and D/A Conversion Techniques and Their applications ADDA-99, Glasgow, U.K., July 26–28, 1999, pp. 134–144. [2] P. Arpaia and H. Schumny, “International standardization of ADC-based measuring systems—State of the art,” Comput. Stand. Interf., vol. 19, no. 3-4, pp. 173–188, 1998. [3] F. H. Irons, D. M. Hummels, I. N. Papantonopulos, and C. A. Zoldi, “Analog-to-digital converter error diagnosis,” in IMTC/1996, Brussels, Belgium, June 1996, pp. 732–736. [4] J. Larrabee, F. H. Irons, and D. M. Hummels, “Using sine wave histograms to estimate analog-to-digital converter dynamic error functions,” IEEE Trans. Instrum. Meas., vol. IM-47, pp. 1448–1456, Dec. 1998. [5] P. Arpaia, P. Daponte, and L. Michaeli, “An analytical a-priori approach to phase plane modeling of SAR A/D converters,” IEEE Trans. Instrum. Meas., vol. IM-47, pp. 849–857, Aug., 1998. , “A dynamic error model for integrating analog-to-digital con[6] verters,” Measurement, vol. 25, no. 4, pp. 255–264, 1999. [7] J. Tsimbinos, “Identification and Compensation of Nonlinear Distortion,” Ph.D., Univ. South Australia, 1995. [8] C. Morandi and L. Niccolai, “An improved code density test for dynamic characterization of A/D converters,” IEEE Trans. Instrum. Meas., vol. IM-43, pp. 384–388, June, 1994. [9] G. Chiorboli, G. Franco, and C. Morandi, “Analysis of distortion in A/D converters by time-domain and code-density techniques,” IEEE Trans. Instrum. Meas., vol. IM-45, pp. 45–49, Feb., 1996. [10] K. Tan, S. Kiriaki, M. De Wit, J. W. Fattaruso, C. Tsai, and W. E. Matthews, “Error correction techniques for high-performance differential A/D converters,” IEEE J. Solid-State Circuits, vol. 25, pp. 1318–1326, Dec. 1990. [11] P. Arpaia, A. C. Serra, P. Daponte, and C. L. Monteiro, “A critical note to IEEE 1057-94 standard on hysteretic ADC dynamic testing,” IEEE Trans. Instrum. Meas., vol. 50, pp. 941–948, Aug. 2001.

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[12] IEEE 1057 Standard for Digitizing Waveform Recorders, SH94245, Dec. 1994. [13] IEEE 1241-2000 Standard for Analog to Digital Converters, 2001. [14] “Methods and Draft Standards for the Dynamic Characterization and Testing of Analog to Digital Converters,” DYNAD Consortium, European Project DYNAD-SMT4-CT98-2214. [15] J. Blair, “Histogram measurement of ADC nonlinearities using sine waves,” IEEE Trans. Instrum. Meas., vol. 43, pp. 373–383, June, 1994. [16] F. Alegria, P. Arpaia, A. C. Serra, and P. Daponte, “An ADC histogram test based on small-amplitude waves,” Measurement, vol. 31, no. 4, pp. 271–279, June 2002. [17] N. Giaquinto, M. Savino, and A. Trotta, “Metrological qualification of data acquisition systems,” Comput. Stand. Interf., vol. CSI-19, pp. 219–230, 1998. [18] J. Schoukens, “A critical note on histogram testing of data acquisition channels,” IEEE Trans. Instrum. Meas., vol. 44, pp. 860–863, Aug., 1995. [19] P. Carbone and D. Petri, “Noise sensitivity of the ADC histogram test,” IEEE Trans. Instrum. Meas., vol. 47, pp. 1001–1004, Aug., 1998.

Conceição Líbano Monteiro was born in Lisbon, Portugal, on September 19th, 1971. She received the Electrical Engineering and Computer Science Diploma and the M.S. degree from the Instituto Superior Técnico (IST), Technical University of Lisbon, in 1994 and 1999, respectively. She is an Assistant Professor at the IST, where she has been a member of the teaching and research staff since 1992. She has been a researcher in the Telecommunications Institute since 1995, integrated in the Instrumentation and Measurement research line. Her current research interests include ADC dynamic testing and characterization, digital signal processing techniques, and frequency-time domain signal analysis.

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Pasquale Arpaia was born in Napoli, Italy, on February 2, 1961. He taught electrical and electronic measurements at the University of Napoli Federico II, Napoli, until 2001. Then he became an Associate Professor with the Department of Engineering, University of Sannino, Benevento, Italy. He has been a Consultant on the EU IV Framework Programme “Standard Measurement and Testing” and an Evaluator for EU INTAS projects. He is responsible, along with Harald Schumny, for the Promoting Committee of the EUPAS Project of the IMEKO TC-4 A/D and D/A Metrology WG. He is Editor of the Subject Area “Digital Instruments Standardization” for the Elsevier Journal Computer Standards & Interfaces. His main research interests include ADC modeling, testing, and standardization, measurement systems on geographic networks, and statistical-based characterization of measurement systems. He has published more than 90 scientific papers in journals and national and international conference proceedings. Dr. Arpaia is a voting member of the IEEE IM TC-10 Waveform Measurement and Analysis.

António Manuel da Cruz Serra was born in Coimbra, Portugal, on December 17, 1956. He received the Electrotechnical Engineering Diploma from the University of Oporto, Oporto, Portugal, in 1978 and the M.S. and Ph.D. degrees in electrical engineering and computers from the Instituto Superior Técnico (IST), Technical University of Lisbon, Lisbon, Portugal, in 1985 and 1992, respectively. He is Associate Professor of instrumentation and measurement at the IST, where he has been a member of the teaching and research staff since 1978. He his the leader of the instrumentation and measurement research line at the Instituto de Telecomunicacoes, Portugal, where he has been since 1994. His current research interests include electrical measurements, ADC characterization techniques, and automatic measurement systems.