Comparative Assessment of the Improvement of Output Voltage with Increased Level Quasi-Z Source Multilevel Inverter Sandipan Patra, Student Member, IEEE, Ankur, Student Member, IEEE, Asit Mohanty, Soumya R. Mohanty, Member, IEEE, and Nand Kishor, Member, IEEE
Abstract—Now-a-days Multilevel inverter are considered the most important and efficient inverter for their better output quality and low voltage stress. quasi-Z Source(q-ZS) converter topology is the extension of Z Source topology in terms of reliability. In this context this paper presents the q-ZSI topology with several levels at the inverter output. A comparative assessment of the improvement of the output voltage is carried out for different levels such as 5-level, 7-level and 9-levl. The series of simulation result followed by a 3rd harmonic distortion (THD) ensures the improvement in case of 9-level. Index Terms—Multilevel, Inverter, quasi Z Source
I. INTRODUCTION
I
N recent years multilevel inverter(MLI) has gained momentum in the areas of medium voltage and high power applications due to their various advantages such as : lower common mode voltage, lower voltage stress on power switches, lower dV/dt ratio, lower harmonics content in the output voltage and current due to switching frequency. Among the three types of multilevel inverters: Cascaded H-bridge, Diode clamped and Capacitor clamped [1-2] the cascade inverter comprises of less component in its configuration for a given number of levels. In Cascade multilevel inverters a series of H-bridge cells are synthesized to obtain desired voltage from several separate DC sources which may be obtained from batteries or fuel cells. Now-a days Z Source Inverter (ZSI) and q-ZSI have been widely applied in various application especially for grid connected renewable energy sources. The q-ZSI utilizes Z impedance network between DC source and inverter circuitry to achieve buck boost operation. They can implement voltage boost and power conversion simultaneously in a single stage and thus improve the reliability due to the shoot through cases, no longer detouring the inverter. The quasi Z-Source inverters with respect to traditional
inverters are lower costs, reliable, lower complexity and higher efficiency. All these properties of cascade inverters allow them to effectively control the inverter using various pulse width modulation (PWM) techniques to control the inverter accurately. In this paper Z Source converter topology is augmented by suitable shoot through duty ratio, further the different level in the configuration is achieved by integration of more H-bridge and the suitable design of inductor and capacitor [3]. The obtain output voltage for the 5,7and 9 level are carried out through the simulation in Matlab platform. II. CASCADED MULTILEVEL QUASI ZSI Cascaded H-bridge multilevel inverter (CHB-MLI) topology is based on the series connection of H-bridges with separate DC sources. The number of such H-bridge required for an n-level are N= (n-1)/2. As the output terminals of the Hbridges are connected in series of MLI, the DC sources must be isolated from each other. The circuit diagram of the proposed configuration is shown in fig. 1 vcb I la Ilb +
Vdc
+ v ca -
Vpn
vcb I la Ilb
O/P
+ +
Vdc
v ca
Vpn
vcb
I la Ilb +
Sandipan Patra, Ankur, Asit Mohanty, S.R. Mohanty are with the Department of Electrical Engineering, Motilal Nehru National Institute of Technology, Allahabad-211004, India (e-mail:
[email protected]). Nand Kishor presently on leave from M. N. National Institute of Technology and working as a post doctoral fellow as Marie Curie Experienced Researcher (Marie Curie Fellow), at Electrical Engineering Department, Aalto University, Finland. Email:
[email protected]
978-1-4673-5630-5//13/$31.00 ©2013 IEEE
Vdc
+
v ca
Vpn
-
Fig. 1. Proposed system Configuration
A. Operation of q-ZSI: The q-ZSI can buck and boost the input voltage in a single stage with two control variables, i.e., the shoot-through duty ratio D and the modulation index M. Equivalent circuits are
D is the Duty ratio, Vca , Vcb are the voltage across the capacitor Ca and Cb. fs is the switching frequency. iLa and iLb are the inductor current La and Lb respectively. III. CONTROL SCHEME
Fig. 2(a) Equivalent circuit of q-ZSI in Non shoot through State
shown in Figs. 2(a) and 2(b), when the proposed circuit operates in two state: non-shoot-through state and the shootthrough state, respectively. All the voltages and the currents are defined in Figs. 2(a) and 2(b).
Fig. 2.(b) Equivalent circuit of q-ZSI in Shoot through state
Assuming T is one switching cycle, T0 is the interval of the shoot-through state; T1 is the interval of non-shoot-through state; their relationship is T0 + T1 = T, and the shoot-through duty ratio D = T0/T. The mathematical Expressions of q-ZSI are well derived in the literature. Voltage across the capacitor Ca and Cb are
Vca =
1− D Vdc 1 − 2D
(1)
D V dc 1− 2D
(2)
V P N = V ca + V cb =
(3)
V cb =
1 V dc 1− 2D Where D is the duty ratio and Vdc is the input voltage.
B. Parameter design of q-ZS impedance network: q-ZSI comprises of two inductors and two capacitors which is further used for filtering purpose. The second order filter is provided in the network configuration to suppress the voltage and current ripples. The current ripple is limited by inductor during the boost mode and is absorbed by the capacitor. Further the voltage is kept constant by the capacitor to make the output voltage sinusoidal. The proper design of capacitor and inductor plays a vital role in its performance [4]. The value of capacitor and inductor are calculated as
D 2 fsaVca D Cb ≥ Ilb 2 fsaVcb D La ≥ Vca 2 fsbila D Lb ≥ Vca 2 fsbilb
Ca ≥ Ilb
Pulse width Modulation control technique is mostly used in the multilevel inverter [5-8]. Here PWM switching signals are generated by a SPWM modulation technique. For a 7-level qZSMLI three reference signals (Vref1, Vref2, and Vref3) were compared with a carrier signal (Vcarrier).The frequency and amplitude of the reference signal remains same and in phase with an offset value that is equivalent to the amplitude of the carrier signal. All the reference signals is compared with the carrier signal. If Vref1 exceeds the peak amplitude Vcarrier, Vref2 is compared with Vcarrier until it exceeds the peak amplitude of Vcarrier. Then, onward, Vref3 would take charge and is compared with Vcarrier until it reaches zero. When Vref3 reaches to zero, Vref2 is compared until it reaches zero. Again Vref1 is compared with the Vcarrier. The shoot-through pulse for q-Z-source network is generated by comparing dc reference line with the carrier signal. Shoot-through time varies depending on the magnitude level of dc reference line as compared with Vcarrier. The frequency of the modulating signal is taken as 50 Hz. The frequency of the triangular signal can be calculated by Frequency modulation index, mf which is given by,
mf =
fc fo
(8)
The frequency of the carrier signal is fc and fo is the frequency of sinusoidal and modulating signals. Output voltage depends on the boost factor [8], 1 1 (9) B = = 2 (V p k − V p ) 2 T sh 1− 1− V pk T Where, Vpk - Peak value of the triangular waveform Vp - Amplitude of the constant Tsh - Shoot-through state period T – Switching period Switching Pulse for HB-1
2 1 0
0
0.002
0.004
0.006
0.008
0.01 Time(S)
0.012
0.014
0.016
0.018
0.02
0
0.002
0.004
0.006
0.008
0.01 Time(S)
0.012
0.014
0.016
0.018
0.02
0
0.002
0.004
0.006
0.008
0.01 0.012 Time(S)
0.014
0.016
0.018
0.02
0.002
0.004
0.006
0.008
0.014
0.016
0.018
0.02
2 1
(4)
0 2
(5)
1 0
(6)
2 1
(7)
0
0
0.01 Time(S)
0.012
9-level in terms of output voltage and THD which is shown in Table-I.
Switching Pulse for HB-2
2 1
140
0
0.002
0.004
0.006
0.008
2
0.01 Time(S)
0.012
0.014
0.016
0.018
0.02 120
1 0
0
0.002
0.004
0.006
0.008
2
0.01 Time(S)
0.012
0.014
0.016
0.018
0.02
1 0
0
0.002
0.004
0.006
0.008
0.01
0.012
0.014
0.016
0.018
Capacitor Voltage(V)
0
100 80 60 40
0.02
Time(S)
20
2 1 0
0
0
0.05
0.002
0.004
0.006
0.008
0.01 Time(S)
0.012
0.014
0.016
0.018
0.2
45
1
40 0.002
0.004
0.006
0.008
0.01 Time(S)
0.012
0.014
0.016
0.018
0.3
0.35
0.4
0.45
0.4
0.45
0.5
1 0
0
0.002
0.004
0.006
0.008
2
0.01 Time(S)
0.012
0.014
0.016
0.018
35
0.02
0.02
Inductor Current(A)
0
2
30 25 20 15
1
10 0
0.002
0.004
0.006
0.008
0.01 Time(S)
0.012
0.014
0.016
0.018
5
0.02
0
2
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.5
Time(S)
1
Fig. 4(b) Inductor current of q-ZSMLI 0.002
0.004
0.006
0.008
0.01
0.012
0.014
0.016
0.018
0.02
Time(S)
Fig.3. Switching pulse of a 7-level q-ZSMLI.
IV. SIMULATION RESULTS A comparison is made among the 5-level, 7-level and 9level q-ZSI however due to the page limitation details study on 7-level inverter is discussed and the comparison of the O/P voltage & THD is shown in the tabular form. The comparison of output voltage & THD is shown in the appendix section. The proposed configuration of quasi-Z source multilevel inverter is simulated in Matlab/Simulink platform. The value of La=Lb= 2 mH and Ca=Cb= 400µF for the quasi-ZSI impedance network. The boost factor and modulation indexes are 1.25 & 0.8. the resistive load used here is 50 Ω & inductive load is 25 mH. The simulation done with LC filter with L= 30mH & L=150 µF. Fig.4(a) & 4(b) shows the capacitor voltage and inductor current of one H-bridge in qZSMLI. Fig.4(c) & 4(d) shows the output voltage waveform and its FFT analysis when only resistive load is connected. 4(e) & 4(f) shows the same when an extra inductive load is connected. Fig. 4(g) shows the O/P resistive load voltage wave waveform when a LC filter is connected. It is shown that THD is reduced to 1.45 % when filter is connected. In Fig.1(i) THD is reduced to 8.26% when resistive & inductive both load are connected. Above all result are for 7-level. Now in 4(k)-4(m) all results are shown for 5-level inverter. Further from 4(n)-4(p) all result are shown for 9-level inverter. A comparative assessment has been done for 5-level, 7-level &
600
400
200
Voltage(V)
0
0
-200
-400
-600 0.25
0.3
0.35
0.4
0.45
0.5
Time(S)
Fig. 4(c) Output voltage of ML-qZSI without filter & pure resistive load. Fundamental (50Hz) = 393.1 , THD= 11.84% 7
6
Mag (% of Fundamental)
0
0.25
Fig. 4(a) Capacitor voltage of q-ZSLI
2
0
0.15
0.02
Switching Pulse for HB-3
0
0.1
Time(S) 0
5
4
3
2
1
0
0
100
200
300
400 500 Frequency (Hz)
600
700
800
900
1000
Fig. 4(d) FFT spectrum of output voltage waveform without filter
500
600
400
400
300 200
Voltage(V)
Voltage(V)
200
0
100 0
-100 -200
-200
-300
-400
-400 -500 0.25
-600 0.25
0.3
0.35
0.4
0.45
0.3
0.35
Time(S)
Fig. 4(e) Output voltage of ML-qZSI without filter & resistive & inductive load without filter.
0.4
0.45
0.5
Time(S)
0.5
Fig. 4(i) Output voltage of ML-qZSI without filter & resistive & inductive load without filter. Fundamental (50Hz) = 451.4 , THD= 8.26%
Fundamental (50Hz) = 356.8 , THD= 20.14%
8 7
4
6
Mag (% of Fundamental)
Mag (% of Fundamental)
5 4.5
3.5 3 2.5 2 1.5
5 4 3 2
1
1 0.5
0
0
0
100
200
300
400 500 Frequency (Hz)
600
700
800
900
0
1000
100
200
300
400 500 Frequency (Hz)
600
700
800
900
1000
Fig. 4(j) FFT spectrum of output voltage waveform with filter
Fig. 4(f) FFT spectrum of output voltage (Fig.4e) waveform without filter 400
300
300 200
200 Voltage(V)
Voltage(V)
100
0
-100
100 0 -100 -200 -300
-200
-400 0.25
-300 0.25
0.3
0.35
0.4
0.45
Time(S)
100
Voltage(V)
Mag (% of Fundamental)
200
5
4
3
1
-300 400 500 Frequency (Hz)
0.5
-100 -200
300
0.45
0
2
200
0.4
300
6
100
Time(S)
400
Fundamental (50Hz) = 249.4 , THD= 1.45%
0
0.35
Fig.4(k) 5-level output voltage with resistive load and without filter
Fig. 4(g) Output voltage of ML-qZSI with filter & pure resistive load.
0
0.3
0.5
600
700
800
900
Fig. 4(h) FFT spectrum of output voltage waveform with filter
1000
-400 0.25
0.3
0.35
Time(S)
0.4
0.45
Fig. 4(l) 5-level output voltage with resistive load and with filter
0.5
TABLE-I SUMMARY OF THE RESULT
Fundamental (50Hz) = 107.4 , THD= 17.49%
Peak Output Voltage(V)
Mag (% of Fundamental)
50
40
30
THD(Without Filter)
THD(With Filter)
R Load
RL load
R Load
RL load
20
10
0
0
100
200
300
400
500
600
700
800
900
1000
Frequency (Hz)
Fig. 4(m) FFT spectrum of output voltage waveform without filter
5 level
400
17.49
26.56
1.9
10.2
7 level
600
11.84
20.14
1.45
8.26
9 level
800
7.29
15.23
0.69
3.9
800 600
V. CONCLUSION
Voltage(V)
400
This paper introduces the quasi-Z Source multilevel inverter with SPWM control technique. It is observed that qZSMLI gives the higher output voltage due to its impedance network. The performance of quasi-Z Source Multilevel inverter is carried out with a low pass LC filter also which reduces the THD. With the increment in level the THD is reduced and the smoother output in the multilevel is obtained.
200 0
-200 -400 -600 -800 0.25
0.3
0.35
0.4
0.45
0.5
VI. REFERENCES
Time(S)
[1]
Fig.4(n) 9-level output voltage with resistive load and without filter 800
[2]
600
Voltage(V)
400
[3]
200 0 -200
[4]
-400 -600
[5]
-800 0.25
0.3
0.35
0.4
0.45
0.5
Time(S)
[6]
Fig. 4(o) 9-level output voltage with resistive load and with filter Fundamental (50Hz) = 621.5 , THD= 7.29%
[7]
6
[8] Mag (% of Fundamental)
5
4
3
2
1
0
0
100
200
300
400 500 Frequency (Hz)
600
700
800
900
Fig.4(p) 9-level output voltage with resistive load and without filter
1000
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