OHMIC CONTACTS TO N-TYPE GALLIUM ARSENIDE

300µm

50µm

OHMIC CONTACTS TO N-TYPE GALLIUM ARSENIDE

Margaret Stevens Jishnu Ganguly ME149 Spring 2017

FABRICATING SEMICONDUCTOR-METAL CONTACTS semiconductor

metal

metal

n-type p-type

external circuit

What devices need Ohmic contacts? Solar cells, light-emitting diodes, transistors…

Ideal contacts should[1]… 1) Be in intimate contact 2) No diffusion/mixing of the semiconductor and metal 3) No absorbed impurities and surface charges.

WHAT IS AN OHMIC CONTACT?

energy

vacuum level

metal

n-type

https://www2.warwick.ac.uk/fac/sci/physics/current/postgraduate/regs/ mpags/ex5/devices/hetrojunction/ohmic/

WHAT IS AN OHMIC CONTACT?

energy

vacuum level

metal

n-type

metal n-type

https://www2.warwick.ac.uk/fac/sci/physics/current/postgraduate/regs/ mpags/ex5/devices/hetrojunction/ohmic/

WHAT IS AN OHMIC CONTACT?

energy

vacuum level

metal n-type

metal n-type

https://www2.warwick.ac.uk/fac/sci/physics/current/postgraduate/regs/ mpags/ex5/devices/hetrojunction/ohmic/

1)

WHAT IS AN OHMIC CONTACT?

metal n-type 2)

metal n-type n+-type

https://www2.warwick.ac.uk/fac/sci/physics/current/postgraduate/regs/ mpags/ex5/devices/hetrojunction/ohmic/

HOW DO YOU TELL A CONTACT IS OHMIC? Transfer Line Method

Rt = Rsemi + 2Rc + 2Rm Rsemi = Rs [L/W]

Rt = [Rs/W]L + 2Rc

𝜌 = RcAc more fundamental than Rc Ac = LtW

OUR PROCESS Goal: 1. Fabricate Ohmic contacts to n-type GaAs of 2 different compositions: i. Ni (75nm)/Ge(90nm)[3] ii. Ni (45nm)/Ge(90nm)/Ni(75nm) 2. Characterize the contact resistance of each recipe 3. Compare addition of rapid thermal annealing step to behavior of contacts[4] 4. Develop a mask with TLM structure to extract contact resistivity.

PROCESS FLOW Photolithography HDMS primer SPR220 (3um) Expose 15s on i-line

HF clean HF:DI water = 1:9 (1min)

Metal Deposition NSC Sputter tool

I-V Test Ohmic or diode?

Rapid Thermal Anneal 600C for 5seconds

Metal lift-off 5 min in acetone Sonication if needed Remover 1165

Take nice pictures!

CONTACT RECIPE #1: DESIGN Advantages Ni/Ge more thermally stable than conventional AuGeNi[2] Less metal layers = easier fabrication in NSC sputter tool.

Germanium (90nm) Nickel (75nm) n+-type GaAs

Wafer specifications: …. ND: 5e18 cm-3 RTA: 600°C for 5seconds

CONTACT RECIPE #1: DIODE BEHAVIOR Ni(75nm) / Ge(90nm) 25µm gap

Ni (75nm) / Ge (90nm) 100µm gap

5.00E-07

4.00E-07

4.00E-07 3.00E-07 2.00E-07

2.00E-07 1.00E-07 0.00E+00 -6

-4

-2

0

-1.00E-07 -2.00E-07

2

4

6

Measured Current (I)

Measured Current (I)

3.00E-07

1.00E-07 0.00E+00 -6

-4

-2

0

-1.00E-07 -2.00E-07

-3.00E-07 -3.00E-07

-4.00E-07 -5.00E-07

Applied Voltage (V)

-4.00E-07

Applied Voltage (V)

2

4

6

CONTACT RECIPE #1: FAILED CONTACT Problems à Solutions 1) Metal tweezers left scratches on the surface of the wafer and damaged the features à use plastic tweezers. 2) Ge layer thickness is less than predicted à Change tooling factor. 3) Testing seemed to ruin contacts à thicker metal layers and reducing the sweeping voltage may help with this.

Expected thickness: 165nm Achieved thickness: 106nm (measured by Dektak profilometer)

CONTACT RECIPE #1: RE-DO

Expected thickness: 165nm Achieved thickness: 156nm

Ni (75nm) / Ge (90nm) Contact Resistance 6

0.3

5

0.2 0.1

200um

0

100um

-1

-0.5

0

0.5

1

4

R (Ω)

Measured Current (A)

0.4

3

-0.1

50um

2

-0.2

25um

1 0

-0.3

0 -0.4

Applied Voltage (V)

50

100

150

200

Length (um) Cannot extract contact resistance form this plot…

250

CONTACT RECIPE #2: DESIGN Recipe: Ni/Ge/Ni presented difficulties in lift-off due to presence of more layers Metal lift-off changed from Acetone to Remover 1165+heat Post deposition

Post photolithography

Post Rapid Thermal Annealing

Post solvent clean

CONTACT RECIPE #2: OHMIC BEHAVIOR Ni (45nm) / Ge (90nm) / Ni (75nm)

Contact resistance 1.40E+04

6.00E-04

1.20E+04

4.00E-04

1.00E+04

2.00E-04

200um

0.00E+00 -1

-0.5

0

0.5

-2.00E-04 -4.00E-04 -6.00E-04 -8.00E-04 -1.00E-03

Applied Voltage (V)

1

100um

R (Ω)

Measured Current (A)

8.00E-04

y = 57.741x + 864.32 R² = 0.96549

8.00E+03 6.00E+03 4.00E+03

50um

2.00E+03

25um

0.00E+00 0

50

100

150

L (um) LT: 14.97 µm RC: 432.16 Ω Width: 300 µm ρC: 1.92e-2 Ω cm2

200

250

FUTURE WORK 1. Decreasing Ohmic contact resistance (Ti/Al/Ni/Au layers) 2. Exposing wafer surface to RIE[5] 3. Ensuring more precise deposition layer thickness 4. Better lift-off methods 5. More stable RTA recipes?

REFERENCES [1] R.F. Pierret Semiconductor Device Fundamentals Addison-Wesley Publishing Company 1996 [2] Lecture Notes EE432. Iowa State University. [3] K. Tanahashi, H. J. Takata, A. Otuki, M. Murakami “Thermally stable non-gold Ohmic contacts to n-type GaAs” Journal of Applied Physics [4] A.G. Baca et al “A survey of Ohmic contacts to III-V compound semiconductors” Thin Film Solids 308-309 (1997) [5] Z. Fan et al Very low resistance multilayer Ohmic contact to n-GaN Appl. Phys. Lett. 68 (12), 18 March 1996