S-parameter based chip/channel co-design techniques for multimode signaling

S-Parameter Based Chip/Channel Co-Design Techniques for Multimode Signaling Zhuo Yan, Chanyoun Won and Paul D. Franzon

Kemal Aygün and Henning Braunisch

Department of Electrical and Computer Engineering North Carolina State University, Raleigh, NC 27606, USA Email: {zyan2, cwon, paulf}@ncsu.edu

Intel Corporation Chandler, AZ 85226, USA Email: {kemal.aygun, henning.braunisch}@intel.com

Abstract—As the demands for higher density of interconnects and denser packages are increasing, crosstalk is becoming more important in I/O design. Multimode signaling was investigated for crosstalk cancellation. This paper presents a new S-parameter based methodology for multimode signaling. CODEC is derived from S-parameter of the whole channel which makes it more applicable for practical systems. The derived CODEC shows a 20 dB improvement in signal to noise ratio (SNR) and 45% reduction of RMS jitter compared with single ended signaling. Keywords-multimode signaling; S-parameters; co-design

I.

INTRODUCTION

With the advancement in system performance and emergence of multicore microprocessors in recent years, higher density of interconnects, aggressive scaling of input/output (I/O) bandwidth, and denser packages are in demand. However, high density chip-to-chip interconnects suffer from higher capacitive and inductive coupling and acerbated crosstalk noise. A crosstalk cancellation coding scheme based on multiconductor transmission line (MTL) theory [1] has been introduced before; we refer to this scheme as multimode signaling [2]. In previous research on multimode signaling, the set of coder-decoder coefficients (CODEC) is derived from transmission line models with constant cross-sectional dimensions. However, in practical systems a large number of discontinuities due to added components such as vias, connectors, package routing, plated through-holes (PTHs), etc. are present. Though a sensitivity analysis for non-ideal channels was presented in [2], a holistic design approach for multimode signaling has not yet been proposed. In this paper, a scattering parameter (S-parameter) based methodology is presented. The new method derives the CODEC for multimode signaling from the S-parameters of the whole channel, which makes it more applicable to practical systems. The Sparameters of the system, i.e., the relationship between the incident and reflected voltages is the theoretical basis of the method. Assuming proper terminations are applied to the channels, signal reflections are neglected, which gives us a direct relationship between the transmitted and received voltage levels. In this work, we demonstrate this method for a practical example channel and derive CODECs for two scenarios: printed circuit board (PCB) only and packages at both ends of the PCB. The results are evaluated with Sparameter plots and the signal jitter improvement over binary multimode signaling [3] is quantified. This research is sponsored by the Semiconductor Research Corporation through Intel custom funding.

II.

S-PARAMETER BASED DESIGN

A. S-Parameters of an N-Port Network For an arbitrary N-port network, the incident and reflected voltages at any port can be related by the S-parameters of the network [4]:

V1−   S11 S12 . . . S1N   − S S . . . S  2N  V2   21 22 .  . .    =   . .  .  .  .  .     VN−   S N 1 S N 2 . . . S NN 

V1+   + V2  .    .  .    VN+ 

(1)

+

Here V j is the voltage of the incident wave at port j and

Vi − is the voltage of the reflected wave at port i. Also, we notice that

Sij =

Vi − V j+

Vk+ =

(2) 0 for k ≠ j

Sij in (2) is the ratio of reflected wave voltage Vi − and +

incident wave voltage V j with all ports other than port j terminated with matched loads. B. Eight-Port Channel Analysis To show how the S-parameters can be used in multimode signaling design, an eight-port channel is studied. The channel is composed of four appropriately referenced signal lines as shown in Fig. 1. The signal lines are characterized by general models; they can include transmission lines on packages and a PCB, and discontinuities such as vias, sockets, etc. We can apply (1) to this channel model by setting N = 8. Again assuming each port is properly terminated, reflections can be −

+

neglected. In our case, V1− 4 and V5−8 can be ignored, which gives us a direct relationship between transmitted voltages and received voltages.

V1+ V1V2+

Transmitter

Port 1

Port 5

Port 2

Port 6

V 6+

Port 3

Port 7

V 7+

Port 4

V 7Port 8 V8+

V 5-

V 6-

V 2V3+ V 3V4+

and the socket and the horizontal routing on the board before repeating a similar set of transitions on the second package. In this case, the routing on the PCB is assumed to be microstrip routing; hence there are no PCB vias in the path of the signals.

V 5+

Receiver

V 8-

V 4-

Figure 1. Eight-Port Channel. This leads to the reduced S-parameter description

V5−   S51 S52  − S S V6   61 62 V −  =  S S 71 72  7   − V8   S81 S82

S53 S54  S63 S64  S73 S74   S83 S84 

V1+   + V2  V +   3  V4+ 

Figure 2. Channel components in the benchmark problem and the corresponding signaling path. (3)

or, in compact form,

Vout = S Vin

(4)

The diagonal entries of the S-parameter matrix in (3) relate to the insertion loss of each line and the off-diagonal entries represent the crosstalk noise between the lines. If we substitute −1 the S matrix with a modified one, namely T ST , (4) becomes reminiscent of the equation in multimode signaling, −1 with T as the coding matrix and T as the decoding matrix:

Vout = T −1ST Vin

(5)

Now by making T the eigenvector matrix of S we are able to eliminate the off-diagonal entries of the S-parameter matrix by diagonalization and thereby reduce the crosstalk noise. In multimode signaling transceiver design [5], matrix T corresponds to the encoding coefficients on the transmitter and −1 matrix T to the decoding coefficients on the receiver. Thus, with the S-parameters of any given channel, it is possible to use the eigenvector matrix as CODEC for multimode signaling. We tested this method for a practical channel benchmark problem, which is presented in Section III. III.

PRACTICAL CHANNEL BENCHMARK

To test the S-parameter based multimode signaling design, we crafted a benchmark problem that includes all the components of a practical real-life complexity I/O channel. The architecture of this channel is depicted in Fig. 2. It is a symmetrical channel comprised of two central processing unit (CPU) dies flip-chip assembled in two packages that reside on the opposite ends of the channel. Both packages are mounted on a land-grid-array (LGA) socket. Each socket is assembled to a PCB through ball-grid-array (BGA) connections. As shown in Fig. 2, the signaling path for the I/O communication starts with the horizontal routing on one of the packages, continues with the vertical transition through the package vias

The stack-up technology design rules (DRs) for the package and the PCB (dielectric and conductor thicknesses for each layer, via dimensions, etc.) and the material set are selected to be within the envelope of today’s high volume manufacturing capability. Similarly, a readily available LGA socket technology is used in this design. Next, we concentrate on the physical and electrical design of the multimode bundles. For this, we select bundle size N to be 4 which is consistent with the formulation presented in Section II. The width of each package and PCB routing trace is selected to match the channel characteristic impedance target. Exception to this are the break-out sections on the package and the PCB where narrower trace widths are used to escape signals out of the die and the package shadow, respectively. The pitch for each routing section on both the package and the PCB is selected such that density of today’s typical CPU packages can be achieved. A similar strategy is also applied in design of the bump-out pattern between the CPU die and the package, and the pin-out pattern between the package and the PCB. It should be noted that, in this particular study, no special effort was made to match the S matrices of various sections in the channel in an effort to represent a challenging case for S-parameter based multimode signaling design. Fig. 3 shows the resulting S-parameters for a typical bundle in the design. Each graph includes the data for all the four traces in the bundle. Resonances in various S-parameter responses are caused by the reflections due to the multiple impedance discontinuities in the channel (break-out sections in the package and the PCB, vias, socket, etc.). This non-ideal nature of the channel also deteriorates the overall return and insertion loss, and the near and far end cross-talk characteristics. However, given the frequency range of interest for multimode circuits in this exercise and the worst Sparameter values for each metric in this range, decision was made not to further optimize the design. This also supports the previous argument of providing a challenging case for Sparameter based multimode signaling design. The electrical models for different components are constructed separately for sake of flexibility. This as a result allows investigation of an S-parameter based multimode

signaling design not only for the complete channel but also for various sub-channel configurations (package only, PCB only, etc.). This is explained in more detail in the following section.

Figure 3. S-parameters for the benchmark problem: (a) Return loss, (b) insertion loss, (c) near end cross-talk, (d) far-end cross-talk. IV.

RESULTS AND DISCUSSION

We applied the S-parameter design method to Intel benchmark for two scenarios: PCB only and packages at both ends of PCB. The results are evaluated in two ways, nondiagonal entries suppression and signal jitter improvement. A. Non-diagonal Entries Suppression We plotted the S matrix and modified S-parameter matrix −1

(a)

T ST in dB to evaluate the CODEC. To make the plot concise, only port 5 and 6 are plotted to illustrate the crosstalk suppression. The figure of merit is the difference in magnitude between diagonal entries and other non-diagonal entries in dB. This figure of merit correspond to signal to noise ratio (SNR); the higher it gets, the better SNR is achieved. 4 GHz is chosen as frequency of interest. Since the S-parameter of practical channel is complex, to −1

fully diagonalize S , the CODEC matrixes T and T have to be complex as well. However, it’s very difficult to implement complex CODEC in the transceiver circuits. Thus, the CODEC is derived from absolute value of matrix S . Fig 4 shows non-diagonal entries are suppressed by 29 dB compared with original S-parameter at 4 GHz. The Sparameter generated CODEC works pretty well on PCB since only few discontinuities present. (b)

(a)

(c)

(b) Figure 4. S-parameters for PCB only: (a) Original S-parameter (b) Modified S-parameter

(d)

Fig. 5 shows the S-parameter plot for full Intel benchmark, the SNR increased by 20 dB at 4 GHz. The improvement is less than the PCB case, since package has more discontinuities.

we could consider it as a delay factor. By expanding the coding scheme T (γ

) T −1 , the timing adjust factor (γ 2 ) −1 could be moved to right after the transmitted signal Vin . This could be 2 −1

implemented as delay circuit followed by CODEC drivers.

(a)

(a)

(b) Figure 5. S-parameters for Benchmark Problem: (a) Original S-parameter (b) Modified S-parameter B. Jitter Improvement on Binary Multimode Signaling The CODEC derivation from absolute S-parameter matrix presents good crosstalk suppression. To show the jitter reduction of this scheme, we employed a newly developed binary multimode signaling scheme [3].

(b) Figure 6. Eye diagram at 4 GHz: (a) Single Ended Signaling (b) Multimode Signaling

Assuming CODEC fully diagonalize S-parameter matrix: γ 12  0 T −1ST =  0 0

0  2 γ2 0 0  0 γ 32 0  0 0 γ 42  0

0

(6)

V.

Or, in compact form,

T −1ST = γ 2

(7)

Where γ is a diagonal matrix and each entry proportional to the flight time on each line. Now, let’s consider a coding 2

scheme at transmitter side transfer function becomes

Fig. 6 shows single ended signaling has RMS jitter 53.9 ps, while multimode signaling has 29.8 ps, reduced about 45%. Both circuits are not equalized.

T (γ 2 ) −1T −1 , then the signal

Vout = S T (γ 2 ) −1T −1Vin

(8)

REFERENCES [1] [2]

Now, substituting (7) into (8),

Vout = S T (T −1ST ) −1T −1Vin

[3]

= S TT −1 S −1 = TT −1 Vin S= S −1 Vin Vin

(9)

Thus, by employing the coding T (γ ) T at transmitter side, binary signal would be recovered at the receiver side 2 −1

without any decoding. Since

γ 2 is

[4]

−1

proportional to flight time,

CONCLUSIONS

In this paper, a new S-parameter based design method is proposed for multimode signaling. The S-parameter derived CODEC is applied to a practical channel benchmark. A 20 dB improvement in SNR and 45% reduction in RMS jitter are achieved in simulation. Since the multimode signaling circuits are not equalized, the RMS jitter could be further reduced if the inter symbol interference (ISI) noise is compensated.

[5]

C. R. Paul, Analysis of Multiconductor Transmisssion Lines, 2nd ed., Wiley-Interscience, New York, NY, 2008. Y. Choi, C. Won, H. Braunisch, K. Aygün, and P. D. Franzon “Multimode signaling on non-ideal channels,” in Proc. IEEE 17th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), San Jose, CA, Oct. 27–29, 2008, pp. 51–54. H. Kim, C. Won, and P.D. Franzon“Crosstalk Cancelling Multi-Mode Interconnect Using Transmitter Encoding” IEEE Trans. Very Large Scale Integr. (VLSI) Syst. Submitted for publication. ** M. B. Steer, Microwave and RF Design: A Systems Approach, SciTech Publishing, Raleigh, NC, 2010. Y. Choi, H. Braunisch, K. Aygün, and P. D. Franzon, “Multimode transceiver for high-density interconnects: Measurement and validation,“ in Proc. IEEE Electronic Components Technol. Conf. (ECTC), Las Vegas, NV, June 1–4, 2010, pp. 1733–1738.