Ultrafast optical clock recovery: towards a system perspective

June 4, 2017 | Autor: Luca Poti | Categoria: Ultrafast Optics, Clock & Data Recovery, Electrical And Electronic Engineering
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Ultrafast optical clock recovery: towards a system perspective L. Pot"ı, M. Luise and G. Prati Abstract: An overview of the most promising optical clock recovery techniques for all-optical ultrafast communication is presented. A step towards a system view for the various techniques is taken, transferring the clock recovery concepts available from the electronic domain into the optical domain, and leading to block diagram interpretation for both open-loop and closed-loop systems. This is essential for future system analyses that will permit design and comparison of different techniques using established analytical tools.

1

Introduction

System synchronisation is one of the main issues in constructing all-optical communication systems, which encompass signal processing subsystems such as all-optical regenerative repeaters, all-optical time division switching systems and all-optical demultiplexers. In order to realise the system synchronisation, an all-optical clock extraction circuit, which recovers timing information from an incoming optical data stream and produces an optical clock without an intermediate electric stage, is required. In principle, recovering the clock from a modulated signal at B Gbit/s means extracting a new periodic signal with period 1/B s, free of information and without phase noise. The periodic optical clock signal will not be in general sinusoidal, that is, its spectrum will contain some harmonics at nB GHz in addition to the fundamental tone at B GHz. It is apparent that a clock recovery technique exclusively based on a filtering process to produce the tone at B GHz and some harmonics requires that such a fundamental tone is already present into the data signal spectrum. Nonreturn-to-zero (NRZ) signalling, for instance, does not comply with this requirement, whereas RZ signalling does. This reveals an advantage of the RZ format (soliton, for instance) for all-optical processing applications, as compared to NRZ; clock recovery from NRZ data needs a preliminary processing stage to derive a tone at B GHz from the original spectrum. Since RZ pulses are in any case necessary in ultrafast optical communication systems to allow for safe optical time division multiplexing and demultiplexing, in the following it is assumed that RZ signalling is used. A basic clock recovery system classification is used to describe timing recovery in ultrafast optical communication. Several clock recovery techniques with their experimental

realisation are reviewed and their individual block interpretation given. Three categories are introduced as natural evolution from the simplest open loop to the most effective scheme stabilised by the use of an optical feedback. 2

System viewpoint

As said, in order to realise the synchronisation system, an all-optical clock extraction circuit is required to recover the timing from an incoming optical data stream and generate an optical clock signal without an intermediate electronic stage. The corresponding block diagram showing the use of the clock recovery subsystem is depicted in Fig. 1a. Ultrafast optical input data are spilled and the clock recovery system provides the optical clock to the ultrafast processor that can be an in-line 3R (re-timing, re-shaping and re-amplifying) regenerator as well as an optical demultiplexer or generic optical processor. The optical timing extraction block must provide a pulsed signal synchronous to the incoming data by cancelling the instantaneous phase difference t(t) defined in Fig. 1b as: D

tð t Þ ¼

where f is the input data frequency. The clock recovery system may simply contain the timing signal generator (Fig. 2a) or include a feedback control block that adjusts the timing signal generator controllable parameters according to monitoring signals from the input and feed back from the output of the generator itself

input data input data

ultra−fast processor

r IEE, 2003 IEE Proceedings online no. 20031001 doi:10.1049/ip-cds:20031001 Paper first received 2nd February 2003 and in revised form 28th August 2003 L. Pot"ı is with the CNIT Photonic Networks National Laboratory, Via Cisanello 145, Pisa 56124, Italy M. Luise is with the Department of Information Engineering, University of Pisa, Via Diotisalvi 2, Pisa 56122, Italy G. Prati is with the Scuola Superiore Sant’Anna, Piazza Martiri della Libert"a 33, Pisa 56127, Italy

506

@Df þt @t

output data

clock clock recovery system a

Fig. 1

t

clock

τ(t) = ∂∆f + τ ∂t

t

b

Clock recovery sytem

a Block diagram b Instantaneous time phase difference definition IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

input data

ultrafast processor

output data

line spectral component

continuous spectral component

∆f bit rate

clock timing signal generator

FSR

df

clock recovery system a input data

ultra−fast processor clock

feedback control

Fig. 4

clock recovery system b

Block diagrams of clock recovery systems

a Open-loop clock recovery b Closed-loop clock recovery

(Fig. 2b). The former approach is referred to as ‘open-loop’ clock recovery, the latter as ‘closed-loop’. High extinction ratio and low timing jitter are major system requirements together with low pattern dependency. Best performances are achieved by using closed-loop schemes accepting an increase in system complexity. 3

Clock recovery techniques

All-optical clock recovery techniques are here outlined in order of increasing complexity and performance.

3.1

b

Passive FPF tank circuit

a Principle of operation b Optical input data stream (top) and recovered clock (bottom)

timing signal generator

Fig. 2

fo − fs fo fo + fs a

output data

extraction. The optical tank circuit has the advantages of ultra high speed operation and simple configuration. Experimental results were presented by Jinno and Matsumoto [1] at a low bit rate (2 Gbit/s) to demonstrate the principle. Figure 4b shows the incoming 2 Gbit/s data (top) and the recovered clock (bottom). Fine frequency tuning was carried out by varying the resonator length with a piezoelectric driver. Better performance was obtained using an active circuit based on the stimulated Brillouin scattering (SBS) technique.

3.2

Injection locking

Mode-locking is a technique to obtain optical pulses from a multimode laser oscillator, forcing the mode relative phases with an active or passive phase or amplitude modulator into the laser cavity. A typical scheme of such a timing signal generator is reported in Fig. 5a, where an electroabsorption (EA) modulator can be used to actively modulate the amplitude or, as a saturable absorber (SA), passively

Tank circuit

The principle is shown in Fig. 3. An optical signal created by return-to-zero (RZ) intensity modulation consists of a continuous spectral component and line spectral components, i.e. the optical carrier frequency f0 and the AM side bands f07fs, f072fsy, where fs denotes the data clock frequency. All-optical timing extraction can be achieved through extracting these line spectral components with a periodic optical filter such as a Fabry–Perot filter (FPF). The FPF has periodic power transmission peaks over a range of optical frequencies. The peak interval, which is called the free spectral range (FSR), is given by the inverse of the round-trip time of the optical resonator. From Fig. 4a, we can find that f0 ¼ qFSR (q is an integer), FSR ¼ fs, and the source linewidth is narrower than the resonator bandwidth. Only the line spectral components, which contain the carrier frequency f0 and the components f07fs, are transmitted. This results in optical timing

timing signal generator delay data in fin

clock fin

mod

a

timing signal generator

VCO f1 f1 = fin VCO 2f1 data in fin

clock fin

timing signal generator data in fs

periodic filter

clock fs

VCO Nf1

~f ∆f = s

b

Fig. 5 Fig. 3

Tank circuit clock recovery block diagram

IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

Open-loop injection locking

a Open-loop injection locking clock recovery scheme b Block diagram 507

intensity 79.14

Fig. 6

79.19 frequency, GHz

79.24

80 GHz recovered clock using a MLLD

Intensity scale: 10 dB/div

intensity, a.u.

modulate the amplitude. If the modulation is related in some way to the presence of an injected data stream, clock recovery can be obtained. An optical data pulse stream is injected into a semiconductor mode-locked laser diode (MLLD). This all-optical clock recovery is based on the synchronisation and stabilisation of the mode-locking operation by optical-pulse injection. This operation is possible because injected optical pulses optically, not electrically, modulate the absorption loss inside the laser. This optical clock recovery scheme can theoretically work with an optical data rate over 160 Gbit/s and can directly generate optical clock pulses at over 160 GHz. Very low excess timing jitter (o100 fs) operation is achieved due to the synchronisation of the MLLD to the injected optical signals. The block diagram shown in Fig. 5b well represents the injection locking technique for mode locking and figureof-eight lasers. The N oscillators represent the N cavity modes. They oscillate at a frequency close to the incoming data or a multiple of that. The sum of all the oscillations gives the output clock. An intrinsic phase comparison with incoming data sets the right phases to all the oscillators. The physical phenomenon producing these phase adjustments is represented by the amplitude or phase modulation that the incoming data induce inside the cavity. An SA could be a typical device involved in the process, but also the gain saturation of a semiconductor optical amplifier (SOA) can be exploited as will be presented later. In figure-of-eight laser modulation is obtained with a nonlinear optical loop mirror. An 80 GHz clock extraction has been demonstrated by Kurita et al. [2]. The device used for clock extraction was a monolithic MLLD that had a gain and an SA section. The data stream was coupled into the MLLD through a 60 dB isolator. The extracted clock rate was dominated by the injected MLLD frequency. The wavelength of the data was 1534 nm. Figure 6 shows the output microwave spectrum of the 80 GHz extracted clock. Lach et al. [3] used a 10 GHz MLLD and they checked device performance for 10 GHz frame clock recovery from a 40 Gbit/s RZ data stream. The 40 Gbit/s optical data at an average power around 6 dBm were injected into the cavity of a 10 GHz mode-locked laser via a 3 dB coupler. The optical output of the MLLD was recorded with a fast pin diode and a 50 GHz sampling oscilloscope. The optical and electrical outputs of the MLLD for clock recovery are shown in Fig. 7 together with the 40 Gbit/s eye diagram of the input data.

21.152

21.2770

21.402

time, ns

Fig. 7 40 Gbit/s input eye diagram (top), 10 GHz optical clock (middle), and 10 GHz electrical clock from the biased modulation section (bottom)

When the phase locking in such injected structures is not an intrinsic phenomenon, it must be induced from the outside. The so called closed-loop scheme is shown in Fig. 8a where an in-cavity delay line is driven by an external low-frequency signal coming from an all-optical ultrafast phase comparator (PC). From the system point of view the PC is a nonlinear block whose output contains low-frequency information about the instantaneous time phase difference between input data stream and recovered clock. As shown in Fig. 8b, the PC output is low-pass filtered and directly applied to the time signal generator VCOs forcing their phases. An external PC is always needed when the oscillating cavity is long as for the fibre laser. The mode-locking fibre laser involves, in the cavity, some discrete devices like erbiumdoped fibre amplifiers (EDFAs), SAOs, an optical fibre, optical tunable filter, isolator and a passive or active modulator. A clock recovery scheme, using a mode-locking

feedback countrol

feedback control

(instantaneous optical) phase comparator

PC

LPF

LPF

timing signal generator delay

data in fin

clock fin

mod

data in fin

VCO f1 f1 = fin VCO 2f1 clock fin

timing signal generator VCO Nf1

a b

Fig. 8

Closed-loop injection locking

a Closed-loop injection locking scheme b Block diagram 508

IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

fibre laser, was presented by Smith and Lucek [4] and it can be kept as a reference for following evolutions. Figure 9 shows the basic idea. The laser cavity and the transmission fibre share a nonlinear modulator (called NOM by the authors). In this way, the input data can serve to modulate either the amplitude or phase of the light in the laser cavity. Providing this modulation takes place with a base period (T) equal to (or a submultiple of) the laser round-trip time, mode locking of the laser follows.

time signal generator VCO 1

delay data in fin

delay mod

clock fin

delay T

data signal in

data signal out VCO 2

NOM lasercavity

gain

transmission fibre

a

output coupler T

filter

time signal generator

clock fin

VCOf1

mode-locked laser output

BPF

Fig. 9 Fibre mode locking laser scheme for optical clock recovery application

The ensuing continuous pulse stream produced by the laser (at a repetition rate 1/T) represents the recovered clock signal. The authors demonstrated a first application at 1 GHz. The same scheme was used at 40 GHz by Ellis et al. [5]. Vlachos et al. [6] used an SOA into the cavity providing both for the gain and for the modulation. Figure 10a shows the experimental setup. Figures 11b and c show the input data and the output recovered clock, respectively. A second optional saturated SOA was used in the experimental setup at the output to reduce the pattern effect. input data EDFA optional output

SOA

DCF

PC 50:50 coapler

filter

b

20:80 coapler

PC ODL

SOA a

50 ps/div c

Fig. 10

Clock recovery scheme using SOA

a Clock recovery experimental setup using a SOA as gain and modulator device in the fibre cavity b Input data c Output recovered clock

Bigo and Desurvire [7] demonstrated the feasibility of a 20 GHz clock recovery with figure-of-eight lasers exploiting the fibre Kerr effect in the NOLM as in-cavity nonlinearity. A promising alternative is represented by self-pulsating distibuted-feedback (SP-DFB) semiconductor lasers. They are optical sources with electrical tunable repetition rates combined with a locking function to an optically injected modulation. Clock recovery with such devices can play an important role in future high-speed OTDM systems. System interpretation of clock recovery based on an SP laser shows that the SP laser is composed of two variable optical oscillators (Fig. 11a). Each oscillator can be IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

data in fin

|f1 − f2| ~ = f1 VCOf2

b

Fig. 11

Open-loop scheme using self-pulsating laser

a Open loop self pulsating scheme b Block diagram

represented by a gain block (the in-cavity semiconductor optical amplifier), a controllable delay (semiconductor waveguide section whose refractive index can be changed by an external voltage) and a modulator (nonlinear active section) also producing intrinsic delay contributions. The two optical oscillations interact into the modulator generating new frequency components spaced by integer multiples of their frequency difference. The optical output becomes a periodic signal whose period is exactly the inverse of the frequency difference. When an external optical modulated signal is launched into the device it interacts with both the oscillators. It forces the modulator to work at its frequency. The oscillators are so indirectly tuned (one more delay section can be imaged into each cavity driven by the modulator output) and their frequencies are changed to have the correct difference. An easy block diagram describing the phenomenon is shown in Fig. 11b. The two VCOs represent the optical oscillators at about 200 THz. The difference between the two frequencies must be very close to the data frequency. A band-pass filter (BPF) centred at fin selects the clock component from the product of the two oscillators. The clock is compared with the injected data and the phase error signal is extracted by a low-pass filter (LPF) and used to drive the VCO. The phase comparison and the frequency adjustment correspond to the carrier modulation induced by the incoming signal inside the semiconductor. Clock recovery has been experimentally obtained at 80 GHz by Bornholdt et al. [8] by injecting the optical data signal into the self-pulsating laser, whose frequency is tuned electrically close to the data rate. The locking range was about 100 MHz, the input power +10 dBm. Due to the polarisation insensitive heterostructure, the locking was independent of the polarisation state of the signal. Figure 12a shows the experimental setup and Fig. 12b shows the microwave output spectrum in the unlocked and locked cases. Figure 12c shows the pattern-free output 509

laser

reflector

circulator LM 45

Peltier

electrical power, dBm

phase data in

temperature control

−50

locked

−55 −60 −65 79.2

clock out

79.5 79.8 frequency, GHz

a

Fig. 12

80.1

b

c

Clock recovery using self-pulsating laser

a Clock recovery experimental setup at 80 GHz b Electrical output power in the unlocked and locked conditions c Output 80 GHz clock trace

clock pulses with a full-width-half-maximum (FWHM) of 6.25 ps. Also in this case, a phase adjustment is needed in order to obtain a pulsating condition. An optical phase comparison between the incoming and the output pulses can provide the error signal to the in-cavity frequency-dependent delay element. The closed-loop block diagram is shown in Fig. 13.

feedback control data infin PC LPF

clock fin feedback control

PC

optical VCO

LPF time signal

LPF

VCOf1 data in fin VCOf2

Fig. 13

3.3

Fig. 14

BPF

clock fin

~f |f1−f2| = in

Closed-loop self-pulsating scheme block diagram

All-optical PLL

We define all-optical phase-locked loop (OPLL) schemes as those involving a phase comparison in the optical domain. After the phase comparison, the low-frequency signal is adjusted in the electrical domain and used as control voltage in an optical voltage control oscillator (O-VCO). A systematic approach can be useful to describe clock recovery subsystems. The scheme is that of a typical PLL as shown in Fig. 14. As in the electric domain, an O-VCO is well represented by an optical oscillator, typically a fibre mode-locked laser in the regenerative configuration, whose frequency can be tuned by applying a control voltage to the piezoelectric delay line, this changing the cavity length. This kind of oscillator has generally a linear characteristic but reduced range (o1 MHz). By time multiplexing of the optical oscillator, it is easy to obtain a high-performance 160 GHz O-VCO. The main block in the OPLL is represented by the phase comparator. It is generally obtained by exploiting a nonlinear effect into 510

All-optical PLL block diagram

an optical medium, such as fibre or semiconductor, and it is the real bottleneck for OPLLs. Saito et al. [9] proposed a prescaled OPLL from 20 GHz to 10 GHz exploiting four wave mixing (FWM) in a dispersion-shifted (DS) fibre. The configuration of the proposed OPLL is shown in Fig. 15. A signal light pulse (l1) and a clock light pulse (l2), which was synchronised with a voltage control oscillator (VCO) output, were launched into a DS fibre. FWM light (l3) was generated in the fibre, including information regarding the phase difference between the signal and the clock light pulses. The FWM light was selected with an optical bandpass filter. Then it was amplified by an EDFA and was detected by a p-i-n photodiode. The electrical output of the detector was fed back into the VCO through a loop filter. A slight phase difference is purposely applied to the VCO output by an electrical phase modulator at a frequency of 100 kHz. By using this ordinary maximum control technique, the PLL is stabilised under any fluctuation in the

20 Gb/s clock signal signal FWM FWM light    3  3 2 1 (1) EDFA



EDFA detector O/E

EDFA

DSF−23km OBF 100kHz mixer 0 = 1.551 µm

20 GHz 10GHz−2vπ PM clock light LD LN (2) 1.551 µm

Fig. 15

VCO

loop filter

10 GHz clock

OPLL experimental setup exploiting FWM in a DS fibre IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

Table 1: Comparison for several major all-optical clock extraction techniques Clock recovery techniques

SP laser

MLLD

Pulse quality

dependent on transformdata pulse limited

Complexity

high

Operation speed (in principle) 4100 GHz

MLFL

Fig. 8

OPLL

FPF

SBSF

transformlimited

transformlimited

transformlimited

dependent on dependent on data pulse data pulse

high

high

high

very high

low

low

o100 GHz

4100 GHz

4100 GHz

4100 GHz

41 THz

4100 GHz

Long-term stability

achievable

achievable

difficult

difficult

achievable

achievable

achievable

Multiwavelength clock extraction

no

no

no

no

no

yes

yes

Bit rate transparency

no

no

no

no

no

no

yes

Extinction ratio

low

low

high

high

high

low

low

Timing jitter

high

high

high

high

low

high

high

polarisation state. The insets in the Figure show the input 20 Gbit/s eye diagram, the 20 GHz clock light, the FWM new wavelength and the electrical 10 GHz VCO output. The phase detector is wavelength-dependent and also if the Kerr effect in the DS fibre is very fast, it is limited in velocity due to the walk-off between signal and clock. An identical scheme was demonstrated by Kim et al. [10] using an SOA instead of the DS fibre. A different phase comparator was proposed by Yamamoto et al. [11] based on a semiconductor laser amplifier loop optical mirror (SLALOM). The OTDM data signal was coupled into the SLALOM, which was driven by an optical control pulse train generated by a tunable mode-locked laser (TMLL). The repetition frequency of the TMML was determined by a VCO. The authors investigated the PLL for 80 and 160 Gbit/s data rates. Figure 16a shows the 80 Gbit/s input eye diagram (top) and the recovered 10 GHz clock. Figure 16b shows the recovered electrical spectra for an 80 Gbit/s (left) and a 160 Gbit/s (right) input signal.

15ps

amplitude, dBm

10 −10 −30 −50 −70 −90 9.95318 9.95328 9.85338 9.95318 9.95328 9.85338 frequency, GHz frequency, GHz

a

Fig. 16

b

PLL for 80 and 160 Gbit/s

a Input 80 Gbit/s data stream (top) and 10 GHz recovered clock b Recovered electrical spectra for an input signal at 80 Gbit/s (left) and at 160 Gbit/s (right)

4

Conclusions and prospects

An overview of the most promising clock extraction techniques have been presented. In Table 1 their main characteristics are summarised for comparison. Further investigation is mandatory for a complete understanding of proposed solutions, their complexity and their limits. Developing further the suggested system approach would

IEE Proc.-Circuits Devices Syst., Vol. 150, No. 6, December 2003

give the opportunity to better understand the working principles, representing a powerful tool for design and performance comparison. All-optical PLL seems to be very promising if an ultrafast phase comparator is used. Alloptical phase comparison needs on ultrafast nonlinear medium. Fibre nonlinear efficiency is limited by channel walk-off due to the cable length, whereas SOA speed is forced by the carrier lifetime if interband phenomena are exploited. A different approach consists in investigating ultrafast intraband nonlinear phenomena in SOAs. FWM or XPM can be as fast as the life times of carrier heating (CH) and spectral hole burning (SHB). These phenomena open new perspectives for future ultrafast clock recovery schemes. 5

References

1 Jinno, M., and Matsumoto, T.: ‘Optical tank circuits used for all-optical timing recovery’, IEEE J. Quantum Electron., 1992, 28, pp. 895–900 2 Kurita, H., Shimizu, T., and Yokoyama, H.: ‘All-optical clock extraction at bit rates up to 80 Gbit/s with monolithic mode-locked laser diodes’. Digest of CLEO’97, 1997, Vol. 1, p. 96 3 Lach, E., Buelow, H., Bouyad-Amine, J., Cebulla, U., Dutting, K., Feeser, T.H., Haisch, H., Kuhn, E., Satzke, K., Schilling, M., Weber, J., Weinmann, R., and Zielinski, E.: ‘Multifunctional application of monolithic mode locked laser in (O)TDM systems: pulse generation and optical clock recovery’. Proc. ECOC’96, Oslo, Norway, Sept. 1996, pp. 23–26 4 Smith, K., and Lucek, J.K.: ‘All-optical clock recovery using a modelocked laser’, Electron. Lett., 1992, 28, pp. 1814–1816 5 Ellis, A.D., Smith, K., and Patrick, D.M.: ‘All-optical clock recovery at bit rates up to 40 Gbit/s’, Electron. Lett., 1993, 29, pp. 1323–1324 6 Vlachos, K., Theophilopoulos, G., Hatziefremidis, A., and Avramopoulos, H.: ‘30 Gb/s all-optical clock recovery circuit’, IEEE Photonics Technol. Lett., 2000, 12, pp. 705–707 7 Bigo, S., and Desurvire, E.: ‘20 GHz all-optical clock recovery based on fibre mode-locking with fibre nonlinear loop mirror as variable intensity/phase modulator’, Electron. Lett., 1995, 31, pp. 1855–1857 8 Bornholdt, C., Bauer, S., Mohrle, M., Nolting, H.-P., and Sartorius, B.: ‘All optical clock recovery at 80 GHz and beyond’. Proc. ECOC 2001, Amsterdam, Netherlands, 30 Sept.–4 Oct. 2001, pp. 502–503 9 Saito, T., Yano, Y., and Henmi, N.: ‘Optical TDM 20 Gb/s-105 km transmission employing newly proposed optical PLL timing extraction’, IEEE Photonics Technol. Lett., 1994, 6, (4), pp. 555–557 10 Kim, D.H., Kim, S.H., Jo, J.C., Jhon, Y.M., Kim, B.K., and Choi, S.S.: ‘40 GHz optical PLL based on four-wave-mixing in a semiconductor optical amplifier’. Proc. LEOS ’99, San Francisco, CA, USA, 1999, Vol. 1, pp. 347–348 11 Yamamoto, T., Oxenlowe, L.K., Schmidt, C., Schubert, C., Hilliger, E., Feiste, U., Berger, J., Ludwig, R., and Weber, H.G.: ‘Clock recovery from 160 Gbit/s data signals using phase-locked loop with interferometric optical switch based on semiconductor optical amplifier’, Electron. Lett., 2001, 37, (8), pp. 509–510

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